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CS 423 – Operating Systems Design Lecture 9 –Context Switches, Coordination Roy Campbell Fall 2010.

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Presentation on theme: "CS 423 – Operating Systems Design Lecture 9 –Context Switches, Coordination Roy Campbell Fall 2010."— Presentation transcript:

1 CS 423 – Operating Systems Design Lecture 9 –Context Switches, Coordination Roy Campbell Fall 2010

2 Context Switch PCBs move from queue to queue as they change state – Red circles indicate where context switches can occur

3 Context Switch Switch between one program control flow and another Context – Machine level: – integer/floating pt/stack/heap/PCB registers – status registers: overflow, branch – memory status: tlb, L1, L2, L3, cache, virtual memory status, addressing faults, memory ops – pipeline/hyperthread status – interrupts: status, pending

4 Instruction Seq for switch Hardware: – IA86 – heavy weight CALL, TSS context switch instructions change registers and stacks. Software: – Light weight, do it yourself register changes. – must change context prior to restore

5 Instruction Seq for switch Hybrid: – Hardware: change program counter/registers via interrupt or operation basic primitive – software must add any additional changed context after switch. – Restoring program counter using hardware primitive – must change context prior to restore

6 Simple software Context Switch) Switch(tCur,tNew) { /* Unload old thread */ TCB[tCur].regs.r7 = CPU.r7; … TCB[tCur].regs.r0 = CPU.r0; TCB[tCur].regs.sp = CPU.sp; TCB[tCur].regs.retpc = CPU.retpc; /*return addr*/ /* Load and execute new thread */ CPU.r7 = TCB[tNew].regs.r7; … CPU.r0 = TCB[tNew].regs.r0; CPU.sp = TCB[tNew].regs.sp; CPU.retpc = TCB[tNew].regs.retpc; return; /* Return to CPU.retpc */ }

7 Additional Context Switch Overhead Application State – stack, heap, sockets… Virtual Machine State – i/o and network support and VM mappings Virtual Memory State - vmtable, tlb cache, User Process, Thread State – thread/process stack, heap, ready queue, exception handling Kernel Process, Thread State – kernel thread/process stack, heap, interrupt vectors

8 Optimizing Context Switch Lazy context switching – wait until dispatch knows what is running next and then change minimized context. When switching between different protection domains, check parameters. Minimize protection checking – Light Remote Procedure Call – don’t check parameters if remain in same protection domain

9 Switch Details How many registers need to be saved/restored? – MIPS 4k: 32 Int(32b), 32 Float(32b) – Pentium: 14 Int(32b), 8 Float(80b), 8 SSE(128b),… – Sparc(v7): 8 Regs(32b), 16 Int regs (32b) * 8 windows = 136 (32b)+32 Float (32b) – Itanium: 128 Int (64b), 128 Float (82b), 19 Other(64b) retpc is where a return should jump to. – In reality, this is implemented as a jump Software switch is often implemented as assembly!

10 Intel Task Switching Instructions JMP, Call to a Task Segment S in a GDT (Global Descriptor Table) JMP, Call to a task-gate descriptor (contains a TSS) in the GDT, or current LDT Implicit call to an interrupt-handler task Implicit call to an exception-handler task A return (IRET) when the NT flag (Nested Task) is set. Used to return from interrupts.

11 Intel CALL Instruction This instruction can be used to execute four types of calls: Near Call — A call to a procedure in the current code segment (the segment currently pointed to by the CS register), sometimes referred to as an intrasegment call. Far Call — A call to a procedure located in a different segment than the current code segment, sometimes referred to as an inter-segment call. Inter-privilege-level far call — A far call to a procedure in a segment at a different privilege level than that of the currently executing program or procedure. Task switch — A call to a procedure located in a different task. See Chapter 7, “Task Management,” in the Intel® 64 and IA-32 Architectures Software Developer’s Manual, Volume 3A, for information on performing task switches with the CALL

12 ©Gabriel Kliot, Technion12 Context switch in Linux

13 ©Gabriel Kliot, Technion13 Memory layout – general picture Stack Process Y user memory TSS of CPU i tss->esp0 Stack Process X user memory Stack Process Z user memory Kernel memory Stack Process Z kernel stack and task_struct task_struc t Stack Process X kernel stack and task_struct task_struc t Stack Process Y kernel stack and task_struct task_struc t

14 ©Gabriel Kliot, Technion14 TSS tss->esp0 #1 – kernel stack after any system call, before context switch ss esp eflags cs eip orig_eax es ds eax ebp edi esi edx ecx ebx prev esp … Schedule() function frame … … User Stack User Code Saved on the kernel stack during a transition to kernel mode by a jump to interrupt and by SAVE_ALL macro task_struct thread.esp0

15 ©Gabriel Kliot, Technion15 prev TSS tss->esp0 esp #2 – stack of prev before switch_to macro in schedule() func task_struct thread.eip thread.esp thread.esp0 Schedule() saved EAX, ECX, EDX Old (schedule’s()) EBP Arguments to contex_switch() Return address to schedule() … …

16 ©Gabriel Kliot, Technion16 TSS tss->esp0 #3 – switch_to: save esi, edi, ebp on the stack of prev task_struct thread.eip thread.esp thread.esp0 prev esp Schedule() saved EAX, ECX, EDX Old (schedule’s()) EBP Arguments to contex_switch() Return address to schedule() EDI ESI EBP … …

17 ©Gabriel Kliot, Technion17 TSS tss->esp0 #4 – switch_to:save esp in prev->thread.esp #4 – switch_to: save esp in prev->thread.esp esp Schedule() saved EAX, ECX, EDX Old (schedule’s()) EBP Arguments to contex_switch() Return address to schedule() EDI ESI EBP … task_struct thread.eip thread.esp thread.esp0 prev …

18 ©Gabriel Kliot, Technion18 next TSS tss->esp0 #5 – switch_to:load next->thread.esp into esp #5 – switch_to: load next->thread.esp into esp prev Schedule() saved EAX, ECX, EDX Old (schedule’s()) EBP Arguments to contex_switch() Return address to schedule() EDI ESI EBP … task_struct thread.eip thread.esp thread.esp0 Schedule() saved EAX, ECX, EDX Old (schedule’s()) EBP Arguments to contex_switch() Return address to schedule() EDI ESI EBP … esp $1f thread.eip thread.esp thread.esp0 task_struct … …

19 ©Gabriel Kliot, Technion19 next TSS tss->esp0 prev Schedule() saved EAX, ECX, EDX Old (schedule’s()) EBP Arguments to contex_switch() Return address to schedule() EDI ESI EBP … task_struct thread.eip thread.esp thread.esp0 Schedule() saved EAX, ECX, EDX Old (schedule’s()) EBP Arguments to contex_switch() Return address to schedule() EDI ESI EBP … esp $1f thread.eip thread.esp thread.esp0 task_struct … #6 – switch_to:save return address in the prev->thread.eip #6 – switch_to: save return address in the prev->thread.eip $1f …

20 ©Gabriel Kliot, Technion20 next TSS tss->esp0 prev Schedule() saved EAX, ECX, EDX Old (schedule’s()) EBP Arguments to contex_switch() Return address to schedule() EDI ESI EBP … task_struct thread.eip thread.esp thread.esp0 Schedule() saved EAX, ECX, EDX Old (schedule’s()) EBP Arguments to contex_switch() Return address to schedule() EDI ESI EBP … esp $1f thread.eip thread.esp thread.esp0 task_struct … $1f #7 – switch_to:save return address on the stack of next #7 – switch_to: save return address on the stack of next $1f …

21 ©Gabriel Kliot, Technion21 nextprev Schedule() saved EAX, ECX, EDX Old (schedule’s()) EBP Arguments to contex_switch() Return address to schedule() EDI ESI EBP … task_struct thread.eip thread.esp thread.esp0 Schedule() saved EAX, ECX, EDX Old (schedule’s()) EBP Arguments to contex_switch() Return address to schedule() EDI ESI EBP … esp $1f thread.eip thread.esp thread.esp0 task_struct … $1f #8 – __switch_to func:save the base of next’s stack in TSS #8 – __switch_to func: save the base of next’s stack in TSS TSS tss->esp0 …

22 ©Gabriel Kliot, Technion22 nextprev Schedule() saved EAX, ECX, EDX Old (schedule’s()) EBP Arguments to contex_switch() Return address to schedule() EDI ESI EBP … task_struct thread.eip thread.esp thread.esp0 Schedule() saved EAX, ECX, EDX Old (schedule’s()) EBP Arguments to contex_switch() Return address to schedule() EDI ESI EBP … esp $1f thread.eip thread.esp thread.esp0 task_struct … $1f #9 – back in switch_to:eip points to $1f instruction label #9 – back in switch_to: eip points to $1f instruction label eip 1: TSS tss->esp0 …

23 ©Gabriel Kliot, Technion23 next TSS tss->esp0 prev Schedule() saved EAX, ECX, EDX Old (schedule’s()) EBP Arguments to contex_switch() Return address to schedule() EDI ESI EBP … task_struct thread.eip thread.esp thread.esp0 Schedule() saved EAX, ECX, EDX Old (schedule’s()) EBP Arguments to contex_switch() Return address to schedule() … esp $1f thread.eip thread.esp thread.esp0 task_struct … $1f #10 – switch_to:restore esi, edi, ebp from the stack of next #10 – switch_to: restore esi, edi, ebp from the stack of next …

24 Where to look for more info The key function for context switching is __switch_to() in ocess_32.c.http://lxr.linux.no/linux+v2.6.35/arch/x86/kernel/pr ocess_32.c The difficulties of optimizing context switching on i7: posts.php Intel processor manuals can be found here: See Page 120 for CALL instruction

25 Where to look for more info The key function for context switching is __switch_to() in x86/kernel/process_32.c.http://lxr.linux.no/linux+v2.6.35/arch/ x86/kernel/process_32.c Reason given for software switching – difficult to recover from errors using hardware switch (particularly segment issues.)

26 Cost of Context Switch 2.8 GHZ Pentium P4, approx 811 ns HW for interrupt, 184 ms address space switch, 67 ns to store/restore registers. As CPUs got faster, switches got faster but took relatively more time as clocks got faster. BUT, software switching vs hardware switching is used because can recover from errors. NOTE: context switching involves invalidating caches - cost varies and can be very large.

27 Arm Context switching “Context Switch Overheads for Linux on ARM Platforms” Francis M. David Jeffrey C. Carlyle Roy H. Campbell

28 Coordination Mutual Exclusion Signals – Buffering – Gang scheduling – Simultaneity – multiple processes waiting for two or more shared events Priorities State machine and other solutions – Atomicity and computation

29 Mutual Exclusion Turtles all the way down

30 Buffering ConsumingWaitingProducing Processes Consuming Processes Producing

31 Gang Scheduling Parallel Processes Rendezvous

32 Simultaneity Which transition fires? How to program?

33 Priorities Many Readers or Single Writer Writer Preference is many writer/readers waiting

34 State Machine Can always build a state machine representation of the synchrnoization condition? When can you do that using semaphores only?

35 CS Fall 2007 Summary Context Switch Coordination


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