Root Cause: Memory Latency Processors work hard to avoid memory latency – memory operations (reads & writes) are re-ordered This is not a problem when … – data is local and/or immutable – there is only single processor People do this also …
Introduction Memory barriers, or fences, are a set of processor instructions used to apply ordering limitations on read and write operations.
Visibility is kind of important – The Java Memory Model – Erlang send operators – Retlang and Jetlang Channels – C++ atomics – Scala Actors – Every semaphore, mutex, or atomic operation
Classifying Memory Barriers Which memory operations does this membar sit between? – LoadLoad – LoadWrite – WriteWrite – WriteLoad Which memory operations are we serializing? – Unidirectional – Bidirectional