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Chapter 6 General Purpose Input/Output

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1 Chapter 6 General Purpose Input/Output
MSP430 Teaching Materials Chapter 6 General Purpose Input/Output Texas Instruments Incorporated University of Beira Interior (PT) Pedro Dinis Gaspar, António Espírito Santo, Bruno Ribeiro, Humberto Santos University of Beira Interior, Electromechanical Engineering Department Copyright Texas Instruments All Rights Reserved

2 Copyright 2009 Texas Instruments
Contents Introduction I/O port registers Interruptible ports Laboratory 2: Blinking the LED: Lab2A: Blinking the LED LAB2B: Blinking the LED at ½ speed Lab2C: Toggle the LED state by button press Lab2D: Enable/disable LED blinking by button press Quiz Copyright Texas Instruments All Rights Reserved

3 Copyright 2009 Texas Instruments
Introduction (1/3) Up to ten 8-bit digital Input/Output (I/O) ports, P1 to P10 (depending on the MSP430 device); I/O ports P1 and P2 have interrupt capability; Each interrupt for these I/O lines can be individually configured: To provide an interrupt on a rising or falling edge; All interruptible I/O lines source a single interrupt vector. The available digital I/O pins for the hardware development tools: eZ430-F2013: 10 pins - Port P1 (8 bits) and Port P2 (2 bits); eZ430-RF2500: 32 pins - Port P1 to P4 (8 bits); Experimenter’s board: 80 pins – Port P1 to P10 (8 bits). Copyright Texas Instruments All Rights Reserved

4 Copyright 2009 Texas Instruments
Introduction (2/3) Each I/O port can be: Programmed independently for each bit; Combine input, output, and interrupt functionality; Edge-selectable input interrupt capability for all 8 bits of ports P1 and P2; Read/write access to port-control registers is supported by all two- or one-address instructions; Individually programmable pull-up/pull-down resistor (2xx family only). Copyright Texas Instruments All Rights Reserved

5 Copyright 2009 Texas Instruments
Introduction (3/3) The port pins can be individually configured as I/O for special functions, such as: USART – Universal Synchronous/Asynchronous Receive/Transmit for serial data; Input comparator for analogue signals; Analogue-to-Digital converter; Others functions (see specific datasheet for details). Copyright Texas Instruments All Rights Reserved

6 Copyright 2009 Texas Instruments
Registers (1/6) Independent of the I/O port type (non-interruptible or interruptible), the operation of the ports is configured by user software, as defined by the following registers: Direction Registers (PxDIR): Read/write 8-bit registers; Select the direction of the corresponding I/O pin, regardless of the selected function of the pin (general purpose I/O or as a special function I/O); For other module functions, must be set as required by the other function. PxDIR configuration: Bit = 1: the individual port pin is set as an output; Bit = 0: the individual port pin is set as an input. Copyright Texas Instruments All Rights Reserved

7 Copyright 2009 Texas Instruments
Registers (2/6) Input Registers (PxIN): When pins are configured as GPIO, each bit of these read-only registers reflects the input signal at the corresponding I/O pin; PxIN configuration: Bit = 1: The input is high; Bit = 0: The input is low; Tip: Avoid writing to these read-only registers because it will result in increased current consumption. Copyright Texas Instruments All Rights Reserved

8 Copyright 2009 Texas Instruments
Registers (3/6) Output Registers (PxOUT): Each bit of these registers reflects the value written to the corresponding output pin. PxOUT configuration: Bit = 1: The output is high; Bit = 0: The output is low. Note: the PxOUT Register is read-write. This means that the previous value written to it can be read back and modified to generate the next output signal. Copyright Texas Instruments All Rights Reserved

9 Copyright 2009 Texas Instruments
Registers (4/6) Pull-up/down Resistor Enable Registers (PxREN): Only available for the 2xx family; Each bit of this register enables or disables the pull-up/pull-down resistor of the corresponding I/O pin. PxREN configuration: Bit = 1: Pull-up/pull-down resistor enabled; Bit = 0: Pull-up/pull-down resistor disabled. When pull-up/pull-down resistor is enabled: In this case Output Registers (PxOUT) select: Bit = 1: The pin is pulled up; Bit = 0: The pin is pulled down. Copyright Texas Instruments All Rights Reserved

10 Copyright 2009 Texas Instruments
Registers (5/6) Function Select Registers: (PxSEL) and (PxSEL2): Some port pins are multiplexed with other peripheral module functions (see the device-specific datasheet); These bits: PxSEL and PxSEL2 (see specific device datasheet), are used to select the pin function: I/O general purpose port; Peripheral module function. PxSEL configuration: Bit = 0: I/O Function is selected for the pin; Bit = 1: Peripheral module function enabled for pin. Copyright Texas Instruments All Rights Reserved

11 Copyright 2009 Texas Instruments
Registers (6/6) Function Select Registers: (PxSEL) and (PxSEL2): The 2xx family of devices provide the PxSEL2 bit to configure additional features of the device; The PxSEL and PxSEL2 bits in combination provide the following configuration: Bit = 0: I/O function is selected for the pin; Bit = 1: Peripheral module function is selected for the pin. PxSEL PxSEL2 Pin Function Selects general purpose I/O function 1 Selects the primary peripheral module function Reserved (See device-specific data sheet) Selects the secondary peripheral module function Note: P1 and P2 configured as peripheral module function (PxSEL = 1 and/or PxSEL2) -> interrupts disabled. Copyright Texas Instruments All Rights Reserved

12 Interruptible ports (P1 and P2) (1/2)
Each pin of ports P1 and P2 is able to make an interrupt request; Pins are configured with additional registers: Interrupt Enable (PxIE): Read-write register to enable interrupts on individual pins; PxIE configuration: Bit = 1: The interrupt is enabled; Bit = 0: The interrupt is disabled. Each PxIE bit enables the interrupt request associated with the corresponding PxIFG interrupt flag; Writing to PxOUT and/or PxDIR can result in setting PxIFG. Copyright Texas Instruments All Rights Reserved

13 Interruptible ports (P1 and P2) (2/2)
Interrupt Edge Select Registers (PxIES): Selects the transition on which an interrupt occurs (if PxIE and GIE are set); PxIES configuration: Bit = 1: Interrupt flag is set on a high-to-low transition; Bit = 0: Interrupt flag is set on a low-to-high transition. Interrupt Flag Registers (PxIFG) Set automatically when an the programmed signal transition (edge) occurs; PxIFG flag can be set and must be reset by software. PxIFG configuration: Bit = 0: No interrupt is pending; Bit = 1: An interrupt is pending. Copyright Texas Instruments All Rights Reserved

14 Laboratory 2: Blinking the LED
Configure the I/O ports to use inputs from push buttons to control the output lines feeding LEDs; The following exercises have been developed for the hardware development tools: Experimenter’s board; eZ430-RF2500; eZ The main differences between these development tools are the specific ports used for the input push buttons and output LEDs. Copyright Texas Instruments All Rights Reserved

15 Lab2A: Blinking the LED (1/6)
Procedure: Check schematics for LED port location (Consult the Hardware Development Tool User's Guide); Port control registers: Set LED pin port as an output; Switch the port state between low and high state during program execution. Configure the watchdog timer to prevent a Power-Up Clear (PUC); Use an infinite loop to modify the state of the port; Use a software delay loop to generate the pause interval (a software delay loop with a long time period is used here for simplicity - in real applications a timer would be used). Copyright Texas Instruments All Rights Reserved

16 Lab2A: Blinking the LED (2/6)
MSP-EXP430FG4618 SOLUTION Using the MSP-EXP430FG4618 Development Tool and the MSP430FG4618 device, blink LED1. Schematics: Copyright Texas Instruments All Rights Reserved

17 Lab2A: Blinking the LED (3/6)
MSP-EXP430FG4618 SOLUTION Using the MSP-EXP430FG4618 Development Tool and the MSP430FG4618 device, blink LED1. LED1 is connected to Port 2.2; Port control registers: P2DIR: Port 2.2 is set as an output: P2DIR |= 0x04 {to force the pin setting, an OR operation ( | ) is performed using P2DIR and 0x04. This makes bit 2 -> 1, without affecting any other port pins. }. P2OUT: P2OUT ^= 0x04; To switch the port state between low and high states, an XOR operation ( ^ ) is performed using P2OUT and 0x04. This reads the value previously written to P2OUT and makes bit 2 change state from 0 -> 1 and 1 -> 0. Copyright Texas Instruments All Rights Reserved

18 Lab2A: Blinking the LED (4/6)
MSP-EXP430FG4618 SOLUTION Using the MSP-EXP430FG4618 Development Tool and the MSP430FG4618 device, blink LED1. To prevent a PUC, the watchdog timer: Must be stop and write 0x5A to the eight MSBs of the Watchdog Timer Control Register, WDTCTL: WDTCTL = WDTHOLD | WDTPW Since no clock has been defined, the device will use a kHz watch crystal: To implement a blinking LED rate of one transition per second, the software delay loop should count to approximately {30000/32768  1 sec}. Copyright Texas Instruments All Rights Reserved

19 Lab2A: Blinking the LED (5/6)
eZ430-RF2500 SOLUTION Using the eZ430-RF2500 Development Tool, blink the red LED. The LED1 is connected to Port 1.1; The programming code follows the same sequence as given for the MSP-EXP430FG4618, requiring only configuration of this port pin. Copyright Texas Instruments All Rights Reserved

20 Lab2A: Blinking the LED (6/6)
eZ430-F2013 SOLUTION Using the Ez430-F2013 Development Tool, blink the LED. The LED is connected to Port 1.0; The programming code follows the same sequence as given for the MSP-EXP430FG4618, requiring only configuration of this port pin. Copyright Texas Instruments All Rights Reserved

21 Lab2B: Blinking the LED 1/2 the speed
Procedure: Using the previous example as a starting point, re-write the code to reduce the value of the software delay to half its previous value; As the LED changes state once per second, the software delay loop should count to approximately {15000/32768  0.5 sec}. Copyright Texas Instruments All Rights Reserved

22 Lab2C: Toggle the LED state by pressing the button (1/5)
Procedure: Analyse the schematics for the locations of the ports used for the LED and button S1 (Consult the Hardware Development Tool User's Guide); Port control registers: Set button pin port as an input; Enable interrupts on this port pin. Configure the watchdog timer to prevent a PUC; Configure a low power mode. Copyright Texas Instruments All Rights Reserved

23 Lab2C: Toggle the LED state by pressing the button (2/5)
MSP-EXP430FG4618 SOLUTION Use the S1 button of the development tool to toggle the state of LED1. You must use interrupts to detect the button press and you should ensure that the MSP430 is in Low Power Mode 3 when it is not in use. LED1 configuration is given in Lab 2A; Button S1 is connected to Port 1.0; Port control registers: P1DIR: Port 1.0 is set as an input: P1DIR &= ~0x01 {to force the pin setting to 0, it uses an AND operation ( & ) between P1DIR and 0xFE}. Copyright Texas Instruments All Rights Reserved

24 Lab2C: Toggle the LED state by pressing the button (3/5)
MSP-EXP430FG4618 SOLUTION Use the S1 button of the development tool to toggle the state of LED1. You must use interrupts to detect the button press and you should ensure that the MSP430 is in Low Power Mode 3 when it is not in use. Port control registers: P1IE: Enable interrupt to port 1.0. PIIES: Call the port interrupt in a high-to-low transition. Configure Watchdog timer. Copyright Texas Instruments All Rights Reserved

25 Lab2C: Toggle the LED state by pressing the button (4/5)
MSP-EXP430FG4618 SOLUTION Use the S1 button of the development tool to toggle the state of LED1. You must use interrupts to detect the button press and you should ensure that the MSP430 is in Low Power Mode 3 when it is not in use. Enable Global Interrupts; Configure the low power mode 3; Create an ISR, that includes: Toggle LED1 pin port; Delay for button debounce; Clear interrupt flag. Copyright Texas Instruments All Rights Reserved

26 Lab2C: Toggle the LED state by pressing the button (5/5)
eZ430-RF2500 SOLUTION Use the button of the development tool to toggle the state of the red LED. You must use interrupts to detect the button press and you should ensure that the MSP430 is in Low Power Mode 3 when it is not in use. Follow the same sequence as given previously, taking note that: Button S1 is connected to Port 1.2. Port control registers: The eZ430-RF2500 uses a device in the 2xx family, so you need to additionally configure the Port 1.2 with a pull-up or pull-down, in the P1REN register. Copyright Texas Instruments All Rights Reserved

27 Lab2D: Enable/disable LED blinking by button press (1/3)
Procedure: Improve the last exercise (Lab 2C) to enable the LED blinking with a button press; Use the previous configuration; Include a control flow program variable that detects whether the LED is blinking or not when the button is pressed. Copyright Texas Instruments All Rights Reserved

28 Lab2D: Enable/disable LED blinking by button press (2/3)
MSP-EXP430FG4618 SOLUTION Use the S1 button of the development tool to start and stop the LED blinking. It is not necessary to use Lower Power Modes in this exercise. Follow the same sequence as given in Lab 2C; Detect if the button is pressed: if (!(P1IN & 0x01)); Define a variable that indicates whether the LED is blinking; Set the program flow depending on the state of this variable. Copyright Texas Instruments All Rights Reserved

29 Lab2D: Enable/disable LED blinking by button press (3/3)
eZ430-RF2500 SOLUTION Use the button in the development tool to start and stop the LED blinking. It is not necessary to use Low Power Modes in this exercise. Follow the same sequence as given in Lab 2C for this hardware development tool and the additional steps provided above. Copyright Texas Instruments All Rights Reserved

30 Copyright 2009 Texas Instruments
Quiz (1/4) In the MSP430 system all I/O ports: (a) Are initially set as outputs when the system powers up; (b) Remain constant as the application program proceeds; (c) Vary with each step of the program; (d) Are initially set as inputs when the system powers up. 2. To set an I/O port pin as output, the: (a) PxDIR direction register bit is set; (b) PxSEL function-select register bit is set; (c) PxIN register bit is set; (d) PxOUT register bit is set. Copyright Texas Instruments All Rights Reserved

31 Copyright 2009 Texas Instruments
Quiz (2/4) 3. An input pin on the MSP430 I/O port configuration requires: (a) Reset the direction register bit, if it previously was set; (b) Set the PxIN register bit to whatever the input data dictates; (c) PxOUT register bit inactive; (d) All of above. 4. For the 2xx family hardware development tools (eZ430-F2013 and eZ430-RF2500), an output pin is pulled down when: (a) PxDIR and PxREN are set; (b) PxDIR is set, PxREN is reset; (c) PxDIR, PxREN and PxOUT are set; (d) PxDIR and PxOUT are reset. Copyright Texas Instruments All Rights Reserved

32 Copyright 2009 Texas Instruments
Quiz (3/4) 5. The eZ430-F2013 Port 1 I/O pin as Sigma/Delta ADC (SD16_A) positive analogue input A0 requires: (a) Set P1SEL bit 0 and P1DIR bit 0; (b) Set P1OUT bit 1 and reset P1DIR bit 1; (c) Set P1IN bit 2 and reset P1DIR bit 2; (d) Set P1SEL bit 1 and reset P1DIR bit 0. 6. To configure an I/O Port 2 to generate an interrupt request during an low-to-high transition: (a) Set the P2DIR, P2IE and P2IES associated bits; (b) Set the P2IE associated bit and reset the P2DIR and P2IES associated bits; (c) Set the P2IE and P2DIR associated bits and reset the P2IES associated bits; (d) None of the above. Copyright Texas Instruments All Rights Reserved

33 Copyright 2009 Texas Instruments
Quiz (4/4) Answers: 1. (d) Are initially set as inputs when the system powers up. 2. (a) PxDIR direction register bit set. 3. (a) Reset the direction register bit, if it was previously set. 4. (b) PxDIR is set, PxREN is reset. 5. (a) Set P1SEL bit 0 (P1SEL = 0x01h) and P1DIR bit 0 (P1DIR = 0x01h). 6. (b) Set the P2IE associated bit and reset the P2DIR and P2IES associated bits. Copyright Texas Instruments All Rights Reserved


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