1. Enabling Power Aware Emulation in Big CPU Project Adriana Wolffberg Vinay Vaddepalli, Osama Neiroukh

2. Agenda IntroductionIntroduction Power Aware Emulation FoundationsPower Aware Emulation Foundations Power Aware Emulation ChallengesPower Aware Emulation Challenges Pioneering workPioneering work SummarySummary IntroductionFoundationsChallengesPioneeringSummary

3. Background IntroductionFoundationsChallengesPioneeringSummary Number of power planes per chip constantly increasing due to aggressive power goalsNumber of power planes per chip constantly increasing due to aggressive power goals Power-aware simulation is already part of main validation methodologyPower-aware simulation is already part of main validation methodology Emulation is becoming key technology in Pre-Si verificationEmulation is becoming key technology in Pre-Si verification Long Tests involving many power on/off states are verified only in emulation Long Tests involving many power on/off states are verified only in emulation

4. Power Aware Emulation Basics IntroductionFoundationsChallengesPioneeringSummary Emulation tool is extended with Power Aware capabilitiesEmulation tool is extended with Power Aware capabilities Based on joint specification and prototypingBased on joint specification and prototyping Emulator takes as input the power architecture of the design from UPF (Unified Power Format - IEEE standard)Emulator takes as input the power architecture of the design from UPF (Unified Power Format - IEEE standard) No RTL or UPF special changes for Emulation compared with SimulationNo RTL or UPF special changes for Emulation compared with Simulation UPF Power Aware Simulator Power Aware Simulator Power Aware Emulator Power Aware Emulator RTL

5. Power Aware Simulation IntroductionFoundationsChallengesPioneeringSummary Power aware simulation mimics circuit behavior for power up/down events When block is powered offWhen block is powered off –Internals and outputs corrupted to X When block powered onWhen block powered on –Start simulation as if @ time zero All internals and outputs corrupted to X Regular Simulation Regular Simulation Corrupt to X Regular Simulation Regular Simulation VCC2VCC3 VCC4 VCC1 OFF ONOFF ON X X X X X

6. Power Aware Emulation Foundations IntroductionFoundationsChallengesPioneeringSummary No Xs in emulation, the emulation engine randomizes powered down domains according to:No Xs in emulation, the emulation engine randomizes powered down domains according to: –Internal state elements are randomized at the time of switching off –Dynamic randomization of outputs of power domains Emulator uses additional circuits to randomize logicEmulator uses additional circuits to randomize logic Random outputs and states Regular Emulation Regular Emulation Random outputs and states Random outputs and states Regular Emulation Regular Emulation VCC2 VCC3 VCC4 VCC1 OFF ON ? ? ? ? ?

7. Power Aware Emulation Challenges IntroductionFoundationsChallengesPioneeringSummary Power Aware Emulatio n Randomizatio n Robustness Constant Propagation Multiply instantiated Instance Cascade Power Switches Combinationa l clouds Assertions Re-trigger Inits Multiple driven wires Continuous Assignments Hierarchical references Forces

8. Power Aware Emulation Challenges IntroductionFoundationsChallengesPioneeringSummary Power Aware Emulatio n Randomizatio n Robustness Constant Propagation Multiply Instantiated Instances Cascade Power Switches Combinationa l Clouds Assertions Re-trigger Inits Multiple driven wires Continuous Assignments Hierarchical references Forces

9. Randomization Robustness - example Power Domain A is turned on ahead of Power Domain B and needs to propagate reset on to Domain BPower Domain A is turned on ahead of Power Domain B and needs to propagate reset on to Domain B Clock Clk gets shut off before Domain B is turned on while reset remains assertedClock Clk gets shut off before Domain B is turned on while reset remains asserted Receiver flop D is turned on after Clk was shut off so it remains stuck at XReceiver flop D is turned on after Clk was shut off so it remains stuck at X –Note that Rst is synchronous This bug cannot be found without power supply modeling. In regular emulation, the reset would be observed by D and the flop would resetThis bug cannot be found without power supply modeling. In regular emulation, the reset would be observed by D and the flop would reset IntroductionFoundationsChallengesPioneeringSummary Domain ADomain B D Clk Rst Din Dout Can we catch this bug with chosen approach of randomization?

10. Randomization Robustness - options Different approaches, what is the impact on capacity/performance?Different approaches, what is the impact on capacity/performance? –Randomization of state elements –Currently: first cycle after a domain switches off –Option: Randomization at given intervals during power off –Randomization of interface of power domains: –Currently: only outputs of power-down domains –Option: also the inputs of power-down domains A test can be run multiple times with different seeds :A test can be run multiple times with different seeds : –Invert all values at switch off instead of randomizing them –Force all state elements to 0 or force all of them to 1. IntroductionFoundationsChallengesPioneeringSummary

11. Constant Propagation Emulation propagates constant as far as possible for optimizationEmulation propagates constant as far as possible for optimization Proposal: stop constant propagation across power boundariesProposal: stop constant propagation across power boundaries Open question: Is there capacity or performance penalty when disabling constant propagation?Open question: Is there capacity or performance penalty when disabling constant propagation? IntroductionFoundationsChallengesPioneeringSummary 0 Domain ADomain B

12. Multiply instantiated hierarchies IntroductionFoundationsChallengesPioneeringSummary Instances of same module can be in different power domainsInstances of same module can be in different power domains Simple example: SUB1 and SUB2 are instances of same module.Simple example: SUB1 and SUB2 are instances of same module. Emulation must factor this in carefully, especially when some hierarchies are power-managed and others are always- on.Emulation must factor this in carefully, especially when some hierarchies are power-managed and others are always- on. SUB1 – Power OFF SUB2 - Power ON TOP - ON

13. Mini Testcases Flow IntroductionFoundationsChallengesPioneeringSummary UPF Simulation build and run Simulatio n dump Emulatio n model Emulation vcd dump Emulation build RTL Emulation vcd dump Emulation dump Merged Emulation dump inferX seed We developed a test plan covering all known challengesWe developed a test plan covering all known challenges For each item in the testplan a simple test case was writtenFor each item in the testplan a simple test case was written Work with Emulator developers to build confidence before starting on big CPU modelWork with Emulator developers to build confidence before starting on big CPU model

14. Summary Power Aware Emulation is highly required in big CPU projectPower Aware Emulation is highly required in big CPU project We took the heavy-lifting of specifying, documenting and productizing power-aware emulation from scratchWe took the heavy-lifting of specifying, documenting and productizing power-aware emulation from scratch Many challenges were found, partMany challenges were found, part are unique to emulation and can be addressed by multiple approaches Currently deploying Power Aware Emulation in big CPU model IntroductionFoundationsChallengesPioneeringSummary