Presentation is loading. Please wait.

Presentation is loading. Please wait.

WTEC Panel on High End Computing in Japan Site visits: March 28 – April 3, 2004 Study Commissioned By: National Coordination Office Department of Energy.

Similar presentations


Presentation on theme: "WTEC Panel on High End Computing in Japan Site visits: March 28 – April 3, 2004 Study Commissioned By: National Coordination Office Department of Energy."— Presentation transcript:

1 WTEC Panel on High End Computing in Japan Site visits: March 28 – April 3, 2004 Study Commissioned By: National Coordination Office Department of Energy National Science Foundation National Aeronautics and Space Administration

2 WTEC Mission Provide assessments of science and technology in a variety of fields Has conducted over 60 international technology assessments using on-site expert panels, far more than any other U.S. organization Studies funded by U.S. Government agencies All results published openly Has sent over 30 delegations to Japan since 1989

3 Purpose & Scope of this Study Gather information on current status and future trends in Japanese high end computing –Govt agencies, research communities, vendors Provide comparison of Japanese HEC R&D and applications activities with those in the U.S. Focus on long-term HEC research in Japan, including follow-on machines to ES & other archs Provide review of ES development process and operational experience –Include user experience and its impact on computer science and computational science communities Determine HEC areas amenable for Japan-U.S. cooperation to accelerate future advances

4 Panel Members Al Trivelpiece (Panel Chair) Former Director Oak Ridge National Laboratory Rupak Biswas Group Lead, NAS Division NASA Ames Research Center Jack Dongarra Director, Innovative Computing Lab University of Tennessee & Oak Ridge National Laboratory Peter Paul Deputy Director, S&T Brookhaven National Laboratory Horst Simon (Advisor) Director, NERSC Lawrence Berkeley National Lab Kathy Yelick Computer Science Professor University of California, Berkeley Dan Reed (Advisor) Computer Science Professor University of North Carolina, Chapel Hill Praveen Chaudhari (Advisor) Director Brookhaven National Laboratory

5 Schedule of Study Jan 9: Kick-off meeting Mar 28 to Apr 3: Travel in Japan May 24, 25: Workshop in Washington, DC, to discuss panel findings Aug 31: Final report completed and published All site visit report drafts will be verified by hosts for accuracy prior to publication

6 Sites Visited: March 29 1.Earth Simulator Center –Located in Yokohama at JAMSTEC –500 MHz SX-6* vector processor; 8 CPUs/node; 640 nodes; 40 TFlops/s peak; single-stage crossbar 2.Frontier Research System for Global Change –Within same JAMSTEC campus –Predict global changes via simulation of coupled high- fidelity atmosphere, ocean, and land models 3.National Institute for Fusion Science (NIFS) –Located in Gifu (near Nagoya) –Host site for Large Helical Device (LHD) –Plasma calculations with SX-7/160

7 Sites Visited: March 30 4.Japan Aerospace Exploration Agency (JAXA) –Formed 10/1/03 by merging National Aerospace Laboratory (NAL), National Space Development Agency (NASDA), and Institute of Space and Astronautical Science (ISAS) –Numerical Simulator III: Fujitsu PrimePower HPC2500; 1.3 GHz SPARC64 V architecture; 8 CPUs/board; 16 boards/cabinet; 14 cabinets; 9.3 TFlops/s peak 5.University of Tokyo –Met with Prof. Yoshio Oyanagi of the Computer Science Department –Provided comprehensive history of HEC in Japan from 1975 to present

8 Sites Visited: March 30 6.Council for Science and Technology Policy (CSTP) – Cabinet Office (reports to PM) – Sets strategic directions for S&T; rates proposals 7.Ministry of Education, Culture, Sports, Science, and Technology (MEXT) – Funds most of S&T R&D activities in Japan 8.Ministry of Economy, Trade, and Industry (METI) – Administers industrial policy – Funds R&D projects with ties to industry

9 Sites Visited: March 31 9.Fujitsu – Have abandoned their traditional vector architectures in favor of commodity cluster technology – PrimePower series: fully-configured system contains 16K CPUs, 85 TFlops/s peak, 64 TB of memory – Pentium processors connected with Infiniband (8 Gb/s); software based on SCore developed by RWCP 10.Tokyo Institute of Technology – Met with Prof. Satoshi Matsuoka of the Global Scientific Information and Computing Center – Obtained TiTechs role in and his perspective on Grid computing in Japan

10 Sites Visited: March National Institute of Advanced Industrial Science and Technology (AIST) – Visited Grid Technology Research Center (Tsukuba) – Grid middleware; new Grid R&D cluster (14TFlops/s) 12.High Energy Accelerator Research Organization (KEK) – Premier high-energy physics laboratory – Operates Belle experiments with large data Grid – Primary HEC effort in Lattice-Gauge computing 13.Tsukuba University – Visited the Center for Computational Physics – Expanded on 4/1 to include broader spectrum of computational science

11 Sites Visited: April 1 14.Hitachi – First vector machine in Japan: S810 in 1987 – Pseudo-vectors: SR2201, SR8000, SR11000 (2003) 15.Research Organization for Information Science and Technology (RIST) – Earth Simulator design started here by Hajime Miyoshi – Serves as a catalyst for computational science and engineering, from climate modeling to nanotechnology 16.IBM-Japan – To get a US companys perspective of HEC in Japan

12 Sites Visited: April 1 17.Institute of Physical and Chemical Research (RIKEN) – Visited the Advanced Center for Computing and Communication – 2048P PC cluster (10TFlops/s) – Major participant in Japanese Grid computing initiative 18.National Research Grid Initiative (NAREGI) – Overseeing the Grid effort in Japan – Consortium of universities and national laboratories

13 Sites Visited: April 2 19.Sony Computer Entertainment Inc. (SECI) – Established in 1993 as a joint venture between Sony Corp and Sony Music Entertainment Inc. – Develops and markets PS1 and PS2 (6 GFlops/s vector performance) 20.NEC – Committed to vector architecture because SX series a technology driver for other components; SX-7: up to 64 nodes; 32 CPUs/node; 18 TFlops/s peak; 16 TB memory – Also has TX-7 server series: 16-way SMP based on IA64 Merced

14 Sites Visited: April 2 21.Japan Atomic Energy Research Institute (JAERI) – Visited Center for Promotion of Computational Science and Engineering in two locations (in Tokai and Ueno) – Lead laboratory in plasma fusion (Tokomak) and nuclear reactor design


Download ppt "WTEC Panel on High End Computing in Japan Site visits: March 28 – April 3, 2004 Study Commissioned By: National Coordination Office Department of Energy."

Similar presentations


Ads by Google