Presentation is loading. Please wait.

Presentation is loading. Please wait.

DREAM is Research on Embedded Architecture and Multisensing Head: François BERRY CONFIDENTIAL.

Similar presentations


Presentation on theme: "DREAM is Research on Embedded Architecture and Multisensing Head: François BERRY CONFIDENTIAL."— Presentation transcript:

1 DREAM is Research on Embedded Architecture and Multisensing Head: François BERRY CONFIDENTIAL

2 Hardware Smart camera, Multisensor, Sensors Network, Embedded systems, Many- core architecture Software Methods ans tools for Language for High-Level Synthesis (HLS), Codesign, Parallel architecture Design Hardware and Software plateforms for Embedded Perception CONFIDENTIAL

3 1. Introduction 3 Hardware Plateforms

4 Imaging device: APTINA CMOS 1024x1024 Couleur/NB E2V CMOS 2048x2048 Couleur/NB Power Supply Provides 10 voltages (1,2v to A + JTAG Programer Main Board Cylcone III EP3C120 Memory Board: SRAM 6 x 100MHz Sensor Board: GPS+ Compass + Inertial Communication Board: USB2,0, Giga-ethernet Hardware Plateforms CONFIDENTIAL

5 DREAMCAM outputStandard camera + PC Automatic extraction of visual features (Harris and Stephen points and ROI) Hardware Plateforms CONFIDENTIAL

6 Hardware Plateforms CONFIDENTIAL

7 Smart Cameras FPGA Private Memories SRAM 1MW SRAM 1MW SRAM 1MW SRAM 1MW SRAM 1MW Communication Sensors Imager Inertial sensor GPS Ours Smart cameras are FPGA-based systems and modular. CONFIDENTIAL

8 The Caph toolset Graph visualizer :. dot format Reference interpreter : – based on the fully formalized semantics – tracing, profiling and debugging Compiler : – elaboration of a target-independant IR – specialized backends (SystemC, VHDL) CONFIDENTIAL

9 1. Introduction Communicating Sequential Process (CSP) Model to design HW et SW Application Many-core architecture prototyping CubeGEN toolset HARDWARE Homogeneous Network of Communicating Processors (HNCP) based on: Distributed memory many core paradigm Efficient communication system : Soft-core processors Passing Message protocol From FIFO to complex DMA-Router SOFTWARE From sequential application to Coarse-grain parallelism application based on generic parallel skeletons Split Compute Merge (SCM), FARM PIPE : pipeline of skeletons

10 1. Introduction CubeGEN : Hardware side Parametrizable SoftCore Router Hardware Memory 3 Bidirectional Links Network of 8 Processors (Hypercube topology) Parametrizable SoftCore Router Hardware Memory HW Parametrization: IP SoftCore (MicroBlaze – SecretBlaze, …) IP Communication Link (FIFO or Noc) IP I/O Data Flow Memory Size Number of processors

11 Staff: F. BERRY Students: F. Pelissier (thèse 3) – Seamoves M. Birem (thèse 2) – Seamoves E. Olaya (thèse 2) – ANR ARMS Staff : A. LANDRAULT, JP DERUTIN, J. SEROT Students : H. Chenini (thèse 4) – Seamoves M-A. Boussadi (thèse 2) – MESR S. Deleplanque (thèse 3) - Innovapole C. Bourasset (thèse 1) – Labex Recipas S. Ahmed (thèse 5) – B. Pakistanaise Software Language for High-Level Synthesis (HLS), Codesign, Many-core* Architecture Hardware Smart camera, Multisensor, Sensors Network, Embedded systems Staff CONFIDENTIAL

12 Implications European project: (Eureka – Euripides) Seamoves (Sensor Enabling Autonomous Motion By Optimized Visual Environment Sensing) Porteur: F. Berry – 1/10/2009- > 30/09/2013 ANR Project: Safeplatoon (Programme Véhicules Pour Les Transports Terrestres Sûreté Des Convois De Véhicules Autonomes) Porteur: J.P. Derutin – 1/03/2011- > 28/02/2014 Fish Parasite (Call ALIA) (Détection de parasite dans les filets de poisson) Porteur: F. Berry – 1/12/2010- > 30/11/2013 Others: Action Labex RECIPAS (Réseau de capteurs intelligents pour laide à la sécurité) Porteur: F. Berry Equipex: CDD de Thierry TIXIER sur 12 mois CONFIDENTIAL


Download ppt "DREAM is Research on Embedded Architecture and Multisensing Head: François BERRY CONFIDENTIAL."

Similar presentations


Ads by Google