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©2012 – Kyungsu Park – IEEE CASE – Seoul – August 22, 2012 – 1 Performance Bounds for Hybrid Flow Lines: Fundamental Behavior, Practical Features and Application.

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Presentation on theme: "©2012 – Kyungsu Park – IEEE CASE – Seoul – August 22, 2012 – 1 Performance Bounds for Hybrid Flow Lines: Fundamental Behavior, Practical Features and Application."— Presentation transcript:

1 ©2012 – Kyungsu Park – IEEE CASE – Seoul – August 22, 2012 – 1 Performance Bounds for Hybrid Flow Lines: Fundamental Behavior, Practical Features and Application to Linear Cluster Tools Kyungsu Park and James R. Morrison Industrial and Systems Engineering IEEE CASE 2012 – August 20 – 24, 2012 – Seoul, South Korea

2 ©2012 – Kyungsu Park – IEEE CASE – Seoul – August 22, 2012 – 2 Presentation Overview Motivation System Description: Hybrid Flow Lines Upper Bound on Completion Times Application to Linear Cluster Tools Concluding Remarks

3 ©2012 – Kyungsu Park – IEEE CASE – Seoul – August 22, 2012 – 3 Motivation: Flow Line Application It is common to abstract intractable problem to simple one Flow line can be used as model for manufacturing systems Application – Automobile assembly plants [A. Agnetis et. al. 1997] – Printed wiring board assembly [T. Sawik 2002] – Printed circuit board (PCB) manufacturing [S. Piramuthu et. al. 1994, R. Wittrock 1985, 1988] – Design of a printer production line in Hewlett-Packard [M. Burman et. al. 1998] Using [Gershwin 1987] and [Dallery, David, and Xie 1988] $280 million in printer shipments and additional revenues Determine how much buffer space is needed with approximate decomposition method – Semiconductor equipment modeling and control [S. Abspoel et. al. 2000]

4 ©2012 – Kyungsu Park – IEEE CASE – Seoul – August 22, 2012 – 4 Motivation: Semiconductor Wafer Manufacturing Global revenue in 2010: US $ 304 Billion+ [1] High construction cost for fabricator: US $ 5 Billion+ [2] Cluster tools – Capital equipment in semiconductor manufacturing – Clustered photolithography tools: US $ 20 Million+ Typically the bottleneck of the fabricator Key yield and cycle time contributor Accurate, expressive, practical and computationally tractable equipment models for fab-level simulation should be developed [1] HIS iSuppli April 2011[2] Elpida Memory, Inc., available at [3] [5] Immersion Lithography: Photomask and Wafer-Level Materials,Roger H. French and Hoang V. Tran. Annual Review of Materials Research, Vol. 39, [3] [5] [4]

5 ©2012 – Kyungsu Park – IEEE CASE – Seoul – August 22, 2012 – 5 Motivation: Flow Line Theory No results for completion times with multiple classes of customers and multi servers Process Time Paper Class of customer Single/ Multi server Exact/Bounds /Approximation Setup Considered Performance metric Etc Random Lau (1986)Single classSingle serverExactNo setupThroughput2 servers Hildebrand (1956)Single classSingle serverExactNo setupThroughput3 servers Mute (1973)Single classSingle serverBoundNo setupThroughput2 or 3 servers Gershwin ( 1987)Single classSingle serverApproximationNo setupThroughputRandom failures Deterministic B. Avi-Itzhak (1965)Single classSingle serverExactNo setupExit time Infinite buffer before 1 st process Altiok and Kao (1989)Single classSingle serverExactNo setupExit time finite buffer before 1 st process J. Morrison (2010)Single classSingle server Exact (Decomposition method) SetupExit time State-dependent setup considered K. Park et. al (2010)Single ClassMulti serversUpper BoundNo setupExit time J. Morrison (2011) Proportional multi class Single serverExactSetupExit time Proportional multi class This Paper (2012)Multi classMulti serversUpper BoundSetupExit time

6 ©2012 – Kyungsu Park – IEEE CASE – Seoul – August 22, 2012 – 6 System Description: Hybrid Flow Lines One module can hold at most one wafer Wafer advance: Service complete & module for next process available Buffers can be modeled as a process module with zero process time Multi class of customer No overtaking (One process can hold only one class) Question: Can we develop an intuitive description of exit times? Can we reduce the computation?

7 ©2012 – Kyungsu Park – IEEE CASE – Seoul – August 22, 2012 – 7 System Description: Hybrid Flow Lines EEEs (Elementary Evolution Equations) – X w,m : entry time of wafer w to process m – c(w): class of wafer w – c(w) m : service time of wafer w for process P m – R(m): number of parallel modules for process m

8 ©2012 – Kyungsu Park – IEEE CASE – Seoul – August 22, 2012 – 8 System Description: Hybrid Flow Lines Single customer class: Multi customer class: – R(m) = R(m) if class does not change – R(m) = 1 if class changes X w,m = max { X w,m-1 + τ c(w) m-1, X w-R(m),m+1 } Wafer is ready to enter Process is available X w,m = max { X w,m-1 + τ c(w) m-1, X w-R(m),m+1, X w-1,m } Preventing overtaking

9 ©2012 – Kyungsu Park – IEEE CASE – Seoul – August 22, 2012 – 9 E(w): the completion time of wafer w from the system a w : arrival time of wafer w Proof: using Max-plus algebra Upper Bound on Completion Times For a hybrid multiclass flow line without overtaking, with the initial conditions E(w) = - for w 0. Theorem 1: Upper Bound on Completion Times

10 ©2012 – Kyungsu Park – IEEE CASE – Seoul – August 22, 2012 – 10 Upper Bound on Completion Times: Proof

11 ©2012 – Kyungsu Park – IEEE CASE – Seoul – August 22, 2012 – 11 Upper Bound on Completion Times Example – Constant process time regardless of class Upper Bound on Completion Times – If c(w)c(w-1), thus class changes, – If not, 1 2

12 ©2012 – Kyungsu Park – IEEE CASE – Seoul – August 22, 2012 – 12 Upper Bound on Completion Times Example: c(w)=c(w-1) 1 2 No contention inside the system

13 ©2012 – Kyungsu Park – IEEE CASE – Seoul – August 22, 2012 – 13 Upper Bound on Completion Times Example: c(w)=c(w-1) 1 2 Last contention of wafer w at process 1 with wafer (w-2)

14 ©2012 – Kyungsu Park – IEEE CASE – Seoul – August 22, 2012 – 14 Upper Bound on Completion Times Example: c(w)=c(w-1) 1 2 Last contention of wafer w at process 2 with wafer (w-3)

15 ©2012 – Kyungsu Park – IEEE CASE – Seoul – August 22, 2012 – 15 Upper Bound on Completion Times Example: c(w)=c(w-1) 1 2 Preventing overtaking

16 ©2012 – Kyungsu Park – IEEE CASE – Seoul – August 22, 2012 – 16 Upper Bound on Completion Times Example: c(w)=c(w-1) Wafer5 Arrive 120sec 1 =20sec 2 =60sec Wafer4 ? Wafer1 ? Wafer2 ? Wafer3 ?

17 ©2012 – Kyungsu Park – IEEE CASE – Seoul – August 22, 2012 – 17 Upper Bound on Completion Times Add new variable P(w,k) to describe setup conditions (e.g. process setups, module setups and state-dependent setups) For a hybrid multiclass flow line with setups, with the initial conditions E(w)=- for w0. Theorem 2: Upper Bound on Completion Times The bound of Theorem 1 cannot be improved to strict equality. Proposition 1: Inequality of Theorem 1 Please refer to the paper for other lemmas and corollaries

18 ©2012 – Kyungsu Park – IEEE CASE – Seoul – August 22, 2012 – 18 Application to Linear Cluster Tools Accurate, expressive, practical and computationally tractable equipment models for fab-level simulation should be developed Circular Cluster Tools – Much effort has been devoted Here, we develop a model for linear cluster tools Robot TypeModel TypeInclude RobotInclude Transient Period Perkinson et al. (1994) Single-arm Expressive model YY (Only for serial tool) Dawande et al. (2007)YN Wood (1996) Wu et al. (2008)Petri netsYY Dawande et al. (2007) Dual-arm Expreessive model YN Venkatesh et al. (1997)YN Kim et al. (2003)Petri netsYN Jacobs et al. (2003) Single-arm/Dual-armExpressive model NN Kohn and Rose (2011)NN

19 ©2012 – Kyungsu Park – IEEE CASE – Seoul – August 22, 2012 – 19 Application to Linear Cluster Tools Linear Cluster Tools – Connected in a linear flow – Consist of a collection of paired process chambers (links) – Each link has its own wafer transport robot FOU P arrives 1a. CVD 300s 1b. CVD 300s FOU P exits 2a. PVD 120s 2b. CVD 120s 1c. CVD 300s 1d. CVD 300s 3. PVD 60s 4. PVD 60s 5. PVD 60s 6. PVD 60s Rolling setups to reduce first wafer delay are introduced.2009, Radloff et. al.Robotic scheduling for steady state is studied.2007, Yi et. al.New flexible tool configuration is proposed by BlueShift Tech.2007, Meulen

20 ©2012 – Kyungsu Park – IEEE CASE – Seoul – August 22, 2012 – 20 Application to Linear Cluster Tools Linear Cluster Tool Include Robotic Overhead (based on scheduling from [2007, Yi et. al.]) Incorporate rolling setups Upper bound on completion times for rolling setups Approximation: Exit times from a linear cluster tool (APPX) Flow Line Model Abstract

21 ©2012 – Kyungsu Park – IEEE CASE – Seoul – August 22, 2012 – 21 Application to Linear Cluster Tools: Simulation Results Compare with detailed simulation – Detailed simulation can be treated as upper bound of optimality – 4 different wafers/lot (W = 3, 5, 10, 24) – Average train size is 3 (T = 3) – Setup duration: Uniform [100,300] – 18,000 lots x 20 replications Throughput: number of complete wafers per hour

22 ©2012 – Kyungsu Park – IEEE CASE – Seoul – August 22, 2012 – 22 Concluding Remarks Develop a model for hybrid flow lines with multiple customer classes and no overtaking – Obtain an upper bound on departure times – Extend these ideas and results for a general class of setups With an application to linear cluster tools – Obtain bounds on hybrid flow lines with rolling setups and develop approximations for linear cluster tools – JIT throughput estimation with about 5% error and 100 times less computation than detailed simulation Future direction – Compare the performance with circular cluster tools – Identify classes of systems for which the bounds achieve equality – Obtain a lower bound on departure times

23 ©2012 – Kyungsu Park – IEEE CASE – Seoul – August 22, 2012 – 23 Flow Line Models Accuracy of Flow Line Models – Control of cluster tool robot: Robot essential: Petri net, MIP models, etc. – Throughput of clustered photolithography tools? Robot overhead can be incorporated into process times Bottleneck behavior dictates throughput Flow Line Models = Cluster Tools ?

24 ©2012 – Kyungsu Park – IEEE CASE – Seoul – August 22, 2012 – 24 Flow Line Models Throughput of cluster tools: – Good robot policy provides bottleneck throughput – Typical robot overhead is small and easy to include – Practical study: 0.5% throughput error and 3% cycle time error (Morrison 2011) – Cycle time estimation for cluster tools (Park and Morrison 2011) ConfigurationFlow lineAPPX Tool 1Serial Tool 2Parallel Tool 3Mixed


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