Presentation on theme: "ARCHITECTURE OF DUAL CORE 1 GAURAV SHRIVASTAVA BCA-2"C""— Presentation transcript:
ARCHITECTURE OF DUAL CORE 1 GAURAV SHRIVASTAVA BCA-2"C"
INTEL DUAL CORE GHz bit 291 million transistors 45nm process 800 MHz FSB 10-65w TDP 143 mm2dye size Socket LGA GAURAV SHRIVASTAVA BCA-2"C"
Intel® Dual-Core Processing Runs two independent processor cores in one physical package at the same frequency. Features up to 2 MB of shared L2 cache and 800 MHz Front Side Bus. Intel® Wide Dynamic Improves execution speed and efficiency, delivering more instructions per clock cycle. Each core can complete up to four full instructions simultaneously. Execution 3GAURAV SHRIVASTAVA BCA-2"C"
BLOCK DIAGRAM 4GAURAV SHRIVASTAVA BCA-2"C"
Cpu core Two cores sharing one bus interface 5GAURAV SHRIVASTAVA BCA-2"C"
Cache Cache is a relatively small block of very fast memory. The data and instructions stored in cache are those that are most recently or most frequently used. Cache speeds up the internal transfer of data and software instructions. Level 1 is fastest, followed by Level 2 6GAURAV SHRIVASTAVA BCA-2"C"
What is L1 and L2? Level-1 and Level-2 caches The cache memories in a computer Much faster than RAM L1 is built on the microprocessor chip itself. L2 is a seperate chip L2 cache is much larger than L1 cache ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE TO MISMATCH OF SPEED BETWEEN L1 AND L2 CACHE 7GAURAV SHRIVASTAVA BCA-2"C"
Architecture The component of CPU include, CU: Control Unit Directs and manages the activities of the processor. ALU: Arithmetic and Logic Unit. Performs Arithmetic and Logical operations.(+, -, x, /, >,<, =) FPU: Floating Point Unit. Performs division and large decimal operations. Cache Memory: Predicts and anticipates the data that the processor needs. I/O Unit: Input Output unit. The gateway for the processor. Register : Which hold temporary data for a specific purpose of function. 8GAURAV SHRIVASTAVA BCA-2"C"
Basic Architecture Control Unit ALU Cache IO Unit Register FPU CPU Bus Internal Buses 9GAURAV SHRIVASTAVA BCA-2"C"
The CPU The CPU interacts(affects) closely with memory (primary storage). CPU Memory Memory, however, is not part of the CPU. 11GAURAV SHRIVASTAVA BCA-2"C"
Parts of the CPU The CPU consists of a variety of parts including: Control Unit ALU Registers Control unit Control unit Arithmetic/logic unit (ALU) Arithmetic/logic unit (ALU) Registers Registers 12GAURAV SHRIVASTAVA BCA-2"C"
The Control Unit… Directs the other parts of the computer system to execute(perform) stored program instructions. The control unit communicates with the ALU and memory. Control Unit 13GAURAV SHRIVASTAVA BCA-2"C"
The Arithmetic/Logic Unit (ALU)… performs mathematical operations as well as logical operations. ALU 14GAURAV SHRIVASTAVA BCA-2"C"
Mathematical Operations The ALU can perform four kinds of mathematical calculations: addition addition subtraction subtraction multiplication multiplication division division 15GAURAV SHRIVASTAVA BCA-2"C"
Logical Operations The ALU can perform logical operations. Logical operations can test for these conditions(position): Equal-to (=) Less-than (<) Greater-than (>) 16GAURAV SHRIVASTAVA BCA-2"C"
Equal-to Condition In a test for this condition, the ALU compares two values to determine if they are equal. If= Then = 17GAURAV SHRIVASTAVA BCA-2"C"
Less-than Condition In a test for this condition, the ALU compares values to determine if one value is less than another. If= Then < 18GAURAV SHRIVASTAVA BCA-2"C"
Greater-than Condition In a test for this condition, the ALU compares values to determine if one value is greater than another. If= Then > 19GAURAV SHRIVASTAVA BCA-2"C"
Registers… are temporary storage areas for data or instructions. Registers Data held temporarily in registers can be accessed at greater speeds than data stored in memory. 20GAURAV SHRIVASTAVA BCA-2"C"
Executing Program Instructions Before the CPU can execute a program, program instructions and data must be placed into memory from an input device or storage device. Input Processing Secondary Storage 21GAURAV SHRIVASTAVA BCA-2"C"
Executing Program Instructions Once the necessary data and instructions are in memory, the CPU performs the following steps for each instruction: CPU Memory Fetching Fetching Decoding Decoding Executing Executing Storing Storing 22GAURAV SHRIVASTAVA BCA-2"C"
Control Unit ALU Registers Fetching Instructions The control unit fetches (gets) the instruction from memory. Memory 23GAURAV SHRIVASTAVA BCA-2"C"
Decoding(solve) Instructions The control unit decodes the instruction and directs that the necessary data be moved from memory to the ALU. Control Unit ALU Registers Memory 24GAURAV SHRIVASTAVA BCA-2"C"
Executing Arithmetic/Logic Operations The ALU performs the arithmetic or logical operation on the data. Control Unit ALU Registers Memory 25GAURAV SHRIVASTAVA BCA-2"C"
Storing Results The ALU stores the result of its operation on the data in memory or in a register. Control Unit ALU Registers Memory 26GAURAV SHRIVASTAVA BCA-2"C"
Executing Program Instructions Eventually, the control unit sends the results in memory to an ou t put device or secondary storage. Output Secondary Storage Control Unit ALU Registers Memory 27GAURAV SHRIVASTAVA BCA-2"C"
Instruction Time The time it takes to fetch an instruction and decode it is called instruction time. Memory Control Unit + Memory Control Unit ALU 28GAURAV SHRIVASTAVA BCA-2"C"
Execution Time The time it takes to execute an ALU operation and then store the result is called execution(perform) time. + ALU Memory ALU Registers 29GAURAV SHRIVASTAVA BCA-2"C"
Control Unit Memory Locations and Addresses The control unit can find data and instructions because each location in memory has an address. Memory 30GAURAV SHRIVASTAVA BCA-2"C"
Storage Locations Each location in memory is identified by an address. Memory Each location has a unique address. 31GAURAV SHRIVASTAVA BCA-2"C"
Symbolic Addresses The choice of the location in memory is arbitrary (determination). Memory Pat $ % Addresses can only hold one number or word. 32GAURAV SHRIVASTAVA BCA-2"C"
Data Representation The system in which all computer data is represented(called) and manipulated(used) is called the binary system. 33GAURAV SHRIVASTAVA BCA-2"C"
Binary System The binary system has only two digits to represent all values. This corresponds to the two states of a computers electrical system on and off. 34GAURAV SHRIVASTAVA BCA-2"C"
Off/On Switches The computer can represent data by constructing combinations of off or on switches. offon or 35GAURAV SHRIVASTAVA BCA-2"C"
Zero or One? The binary system can also be represented by the digits zero and one. 01or Zero (off) and one (on) make up the two digits in the binary system. 36GAURAV SHRIVASTAVA BCA-2"C"
The Bit Each 0 or 1 in the binary system is called a bit. one bit two bits three bits 37GAURAV SHRIVASTAVA BCA-2"C"
The Byte A group of 8 bits is called a byte GAURAV SHRIVASTAVA BCA-2"C"
One Character of Data Each byte represents one character of data (a letter, digit, or special character) J = 39GAURAV SHRIVASTAVA BCA-2"C"
FSB bottleneck other I/O links I/O Chipset I/O Chipset Intel DUAL-Core Processor Shared L2 Cache Intel Core 1 Intel Core 1 Intel Core 2 Intel Core 2 Die 1 Die 2 WORKING DUAL-CORE ->GETTING DATA FROM RAM (MEMORY) ->DATA GOES TO I/Q DEVICES ->DATA SHARED BY TWO CORES ->FSB (FRONT SIDE DATA BUS)WHICH IS DIRECTLY CONNECTED TO MEMORY 40 GAURAV SHRIVASTAVA BCA-2"C"
Hyper threading A technology developed by Intel that enables multithreaded(current of data) software applications to execute threads in parallel on a single processor instead of processing threads in a linear fashion. Older systems took advantage of dual-processing threading in software by splitting(dividing) instructions into multiple streams so that more than one processor could act upon (on)them at once. 41GAURAV SHRIVASTAVA BCA-2"C"
The Pentium Dual core will require a new motherboard, built 945/955 core logic. If you insert a Pentium Dual core into a current 915 or 925XE(PGA 495) motherboard, the system simply won't bootneither the CPU or motherboard will be damaged. It simply won't work. 43GAURAV SHRIVASTAVA BCA-2"C"
Why multicore? New modern processors are launched How to make a use of new technologies? Dual-core CPU Quad-core CPU 44 GAURAV SHRIVASTAVA BCA-2"C"
Difficult to make single-core clock frequencies even higher Deeply pipelined circuits(term): – heat problems Many new applications are multithreaded General(common) trend in computer architecture 45GAURAV SHRIVASTAVA BCA-2"C"
Editing a photo while recording a TV show through a digital video recorder Downloading software while running an anti-virus program Anything that can be threaded today will map efficiently to multi-core 46GAURAV SHRIVASTAVA BCA-2"C"
Multi-core chips an important new trend in computer architecture Several new multi-core chips in design phases likely to gain importance 47GAURAV SHRIVASTAVA BCA-2"C"
Microprocessor Speeds Microprocessor speeds can be measured in a variety of ways: Megahertz MIPS Megaflops Fsb 48GAURAV SHRIVASTAVA BCA-2"C"
Megahertz One measure of microprocessor speed is megahertz (MHz) which is one million machine cycles per second. gigahertz (billions of cycles per second). 49GAURAV SHRIVASTAVA BCA-2"C"
MIPS Another measure of microprocessor speed is MIPS which is one million instructions per second. 50GAURAV SHRIVASTAVA BCA-2"C"
Megaflops Megaflops, or one million floating-point operations per second, is still another measure of microprocessor speed. 51GAURAV SHRIVASTAVA BCA-2"C"
Front Side Bus (FSB(: Measured in megahertz (MHz), the FSB is the channel that connects the processor with main memory. The faster this is, the better the performance will be. The Front Side Bus operates at a speed which is a percentage of the CPU clock speed. The faster the speed at which the Front Side Bus allows data transfer, the better the performance of the CPU. FSB 52GAURAV SHRIVASTAVA BCA-2"C"
Bus Lines A bus line is a set of parallel electrical paths. A bus is like a mode of transportation for data. Bus width (Wide)= the number of wires in the bus over which data can travel+-- 53GAURAV SHRIVASTAVA BCA-2"C"
Bus Width(wide) The amount of data that can be carried at one time is bus width (wider = more data). 54GAURAV SHRIVASTAVA BCA-2"C"
Processor Types Two types: 1. Socket type 2. Slot type. Pin arrangement in the Socket type processor is known as Pin Grid Array (PGA). Slot type processor is also known as Single Edged Contact Cartridge (SECC). 56GAURAV SHRIVASTAVA BCA-2"C"
Types of Processors SECC PGA 57GAURAV SHRIVASTAVA BCA-2"C"