Presentation on theme: "ARCHITECTURE OF DUAL CORE"— Presentation transcript:
1 ARCHITECTURE OF DUAL CORE GAURAV SHRIVASTAVA BCA-2"C"
2 INTEL DUAL COREGHz bit 291 million transistors 45nm process 800 MHz FSB 10-65w TDP 143 mm’2dye size Socket LGA 775GAURAV SHRIVASTAVA BCA-2"C"
3 Intel® Dual-Core Processing Runs two independent processor cores in one physical package at the same frequency. Features up to 2 MB of shared L2 cache and 800 MHz Front Side Bus.Intel® Wide Dynamic Improves execution speed and efficiency, delivering more instructions per clock cycle. Each core can complete up to four full instructions simultaneously.ExecutionGAURAV SHRIVASTAVA BCA-2"C"
5 Cpu core Two cores sharing one bus interface GAURAV SHRIVASTAVA BCA-2"C"
6 CacheCache is a relatively small block of very fast memory. The data and instructions stored in cache are those that are most recently or most frequently used. Cache speeds up the internal transfer of data and software instructions. Level 1 is fastest, followed by Level 2GAURAV SHRIVASTAVA BCA-2"C"
7 What is L1 and L2? Level-1 and Level-2 caches The cache memories in a computerMuch faster than RAML1 is built on the microprocessor chip itself.L2 is a seperate chipL2 cache is much larger than L1 cacheALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE TO MISMATCH OF SPEED BETWEEN L1 AND L2 CACHEGAURAV SHRIVASTAVA BCA-2"C"
8 Architecture The component of CPU include, CU: Control Unit Directs and manages the activities of the processor.ALU: Arithmetic and Logic Unit. Performs Arithmetic and Logical operations.(+, -, x, /, >,<, =)FPU: Floating Point Unit. Performs division and large decimal operations.Cache Memory: Predicts and anticipates the data that the processor needs.I/O Unit: Input Output unit. The gateway for the processor.Register : Which hold temporary data for a specific purpose of function.GAURAV SHRIVASTAVA BCA-2"C"
9 Basic Architecture CPU Bus Internal Buses Control Unit FPU ALU Cache IO UnitRegisterFPUCPU BusInternal BusesGAURAV SHRIVASTAVA BCA-2"C"
11 The CPU CPU Memory Memory, however, is not part of the CPU. The CPU interacts(affects) closely with memory (primary storage).CPUMemory, however, is not part of the CPU.MemoryGAURAV SHRIVASTAVA BCA-2"C"
12 Parts of the CPU Control unit Arithmetic/logic unit (ALU) Registers The CPU consists of a variety of parts including:Control unitControl UnitALUArithmetic/logic unit (ALU)RegistersRegistersGAURAV SHRIVASTAVA BCA-2"C"
13 The Control Unit…Directs the other parts of the computer system to execute(perform) stored program instructions.Control UnitThe control unit communicates with the ALU and memory.GAURAV SHRIVASTAVA BCA-2"C"
14 The Arithmetic/Logic Unit (ALU)… performs mathematical operations as well as logical operations.ALUGAURAV SHRIVASTAVA BCA-2"C"
15 Mathematical Operations The ALU can perform four kinds of mathematical calculations:additionsubtractionmultiplicationdivisionGAURAV SHRIVASTAVA BCA-2"C"
16 Logical Operations The ALU can perform logical operations. Logical operations can test for these conditions(position):Equal-to (=)Less-than (<)Greater-than (>)GAURAV SHRIVASTAVA BCA-2"C"
17 Equal-to Condition = If = Then In a test for this condition, the ALU compares two values to determine if they are equal.If=Then=GAURAV SHRIVASTAVA BCA-2"C"
18 Less-than Condition < If = Then In a test for this condition, the ALU compares values to determine if one value is less than another.If=Then<GAURAV SHRIVASTAVA BCA-2"C"
19 Greater-than Condition In a test for this condition, the ALU compares values to determine if one value is greater than another.If=Then>GAURAV SHRIVASTAVA BCA-2"C"
20 Registers…are temporary storage areas for data or instructions.Data held temporarily in registers can be accessed at greater speeds than data stored in memory.RegistersGAURAV SHRIVASTAVA BCA-2"C"
21 Executing Program Instructions Before the CPU can execute a program, program instructions and data must be placed into memory from an input device or storage device.SecondaryStorageInputProcessingGAURAV SHRIVASTAVA BCA-2"C"
22 Executing Program Instructions Once the necessary data and instructions are in memory, the CPU performs the following steps for each instruction:CPUMemoryFetchingDecodingExecutingStoringGAURAV SHRIVASTAVA BCA-2"C"
23 Fetching Instructions Control UnitALUThe control unit fetches (gets) the instruction from memory.RegistersMemoryGAURAV SHRIVASTAVA BCA-2"C"
24 Decoding(solve) Instructions The control unit decodes the instruction and directs that the necessary data be moved from memory to the ALU.Control UnitALURegistersMemoryGAURAV SHRIVASTAVA BCA-2"C"
25 Executing Arithmetic/Logic Operations The ALU performs the arithmetic or logical operation on the data.Control UnitALURegistersMemoryGAURAV SHRIVASTAVA BCA-2"C"
26 Storing Results Memory The ALU stores the result of its operation on the data in memory or in a register.Control UnitALURegistersMemoryGAURAV SHRIVASTAVA BCA-2"C"
27 Executing Program Instructions Eventually, the control unit sends the results in memory to an output device or secondary storage.SecondaryStorageControl UnitALURegistersMemoryOutputGAURAV SHRIVASTAVA BCA-2"C"
28 Instruction TimeThe time it takes to fetch an instruction and decode it is called instruction time.MemoryControl UnitALUMemoryControl Unit+GAURAV SHRIVASTAVA BCA-2"C"
29 Execution TimeThe time it takes to execute an ALU operation and then store the result is called execution(perform) time.ALUMemoryALURegisters+GAURAV SHRIVASTAVA BCA-2"C"
30 Memory Locations and Addresses The control unit can find data and instructions because each location in memory has an address.Control UnitMemoryGAURAV SHRIVASTAVA BCA-2"C"
31 Storage Locations Memory Each location has a unique address. Each location in memory is identified by an address.MemoryEach location has a unique address.GAURAV SHRIVASTAVA BCA-2"C"
32 Symbolic Addresses Memory % 17 The choice of the location in memory is arbitrary (determination).17$%PatAddresses can only hold one number or word.364MemoryGAURAV SHRIVASTAVA BCA-2"C"
33 Data RepresentationThe system in which all computer data is represented(called) and manipulated(used) is called the binary system.GAURAV SHRIVASTAVA BCA-2"C"
34 Binary SystemThe binary system has only two digits to represent all values.This corresponds to the two states of a computer’s electrical system —on and off.GAURAV SHRIVASTAVA BCA-2"C"
35 Off/On Switches off or on The computer can represent data by constructing combinations of off or on switches.offoronGAURAV SHRIVASTAVA BCA-2"C"
36 Zero or One?The binary system can also be represented by the digits zero and one.or1Zero (off) and one (on) make up the two digits in the binary system.GAURAV SHRIVASTAVA BCA-2"C"
37 The Bit one bit two bits three bits Each 0 or 1 in the binary system is called a bit.one bittwo bitsthree bitsGAURAV SHRIVASTAVA BCA-2"C"
38 The Byte 1 1 1 A group of 8 bits is called a byte. 111GAURAV SHRIVASTAVA BCA-2"C"
39 J One Character of Data = Each byte represents one character of data (a letter, digit, or special character).1=JGAURAV SHRIVASTAVA BCA-2"C"
40 Intel DUAL-Core Processor WORKING DUAL-CORE->GETTING DATA FROM RAM (MEMORY) ->DATA GOES TO I/Q DEVICES ->DATA SHARED BY TWO CORES ->FSB (FRONT SIDE DATA BUS)WHICH IS DIRECTLY CONNECTED TO MEMORYIntel DUAL-Core ProcessorDie 1Die 2Shared L2 CacheIntelCore 1Core 2FSBbottleneckI/OChipsetother I/O linksGAURAV SHRIVASTAVA BCA-2"C"40
41 Hyper threadingA technology developed by Intel that enables multithreaded(current of data) software applications to execute threads in parallel on a single processor instead of processing threads in a linear fashion. Older systems took advantage of dual-processing threading in software by splitting(dividing) instructions into multiple streams so that more than one processor could act upon (on)them at once.GAURAV SHRIVASTAVA BCA-2"C"
43 The Pentium Dual core will require a new motherboard, built 945/955 core logic. If you insert a Pentium Dual core into a current 915 or 925XE(PGA 495) motherboard, the system simply won't boot—neither the CPU or motherboard will be damaged. It simply won't work.GAURAV SHRIVASTAVA BCA-2"C"
44 Why multicore? New modern processors are launched How to make a use of new technologies?Dual-core CPUQuad-core CPU44GAURAV SHRIVASTAVA BCA-2"C"44
45 • Difficult to make single-core clock frequencies even higher • Deeply pipelined circuits(term):– heat problems• Many new applications are multithreaded• General(common) trend in computer architectureGAURAV SHRIVASTAVA BCA-2"C"
46 • Editing a photo while recording a TV show through a digital video recorder• Downloading software while running ananti-virus program• “Anything that can be threaded today willmap efficiently to multi-core”GAURAV SHRIVASTAVA BCA-2"C"
47 computer architecture • Several new multi-core chips in design phases • Multi-core chips animportant new trend incomputer architecture• Several new multi-corechips in design phaseslikely to gain importanceGAURAV SHRIVASTAVA BCA-2"C"
48 Microprocessor Speeds Microprocessor speeds can be measured in a variety of ways:MegahertzMIPSMegaflopsFsbGAURAV SHRIVASTAVA BCA-2"C"
49 MegahertzOne measure of microprocessor speed is megahertz (MHz) which is one million machine cycles per second. gigahertz(billions of cycles per second).GAURAV SHRIVASTAVA BCA-2"C"
50 MIPSAnother measure of microprocessor speed is MIPS which is one million instructions per second.GAURAV SHRIVASTAVA BCA-2"C"
51 MegaflopsMegaflops, or one million floating-point operations per second, is still another measure of microprocessor speed.GAURAV SHRIVASTAVA BCA-2"C"
52 FSBFront Side Bus (FSB(: Measured in megahertz (MHz), the FSB is the channel that connects the processor with main memory. The faster this is, the better the performance will be. The Front Side Bus operates at a speedwhich is a percentage of the CPU clockspeed. The faster the speed at which the Front SideBus allows data transfer, the better theperformance of the CPU.GAURAV SHRIVASTAVA BCA-2"C"
53 Bus LinesA bus line is a set of parallel electrical paths. A bus is like a mode of transportation for data.Bus width (Wide)= the number of wires in the bus over which data can travel+--GAURAV SHRIVASTAVA BCA-2"C"
54 Bus Width(wide)The amount of data that can be carried at one time is bus width (wider = more data).GAURAV SHRIVASTAVA BCA-2"C"
56 Processor Types Two types: Socket type Slot type. Pin arrangement in the Socket type processor is known as Pin Grid Array (PGA).Slot type processor is also known as Single Edged Contact Cartridge (SECC).GAURAV SHRIVASTAVA BCA-2"C"
57 Types of ProcessorsPGASECCGAURAV SHRIVASTAVA BCA-2"C"