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DDR SDRAM The Memory of Choice for Mobile Computing Bill Gervasi Technology Analyst, Transmeta Corporation Chairman, JEDEC Memory Parametrics

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Presentation on theme: "DDR SDRAM The Memory of Choice for Mobile Computing Bill Gervasi Technology Analyst, Transmeta Corporation Chairman, JEDEC Memory Parametrics"— Presentation transcript:

1 DDR SDRAM The Memory of Choice for Mobile Computing Bill Gervasi Technology Analyst, Transmeta Corporation Chairman, JEDEC Memory Parametrics

2 2 Topics to Cover Market Segments & Fragments Market Segments & Fragments Mobile Design Architectures Mobile Design Architectures DDR and SDR Power Analysis DDR and SDR Power Analysis DDR SO-DIMM Details DDR SO-DIMM Details

3 3 Segments & Fragments Servers Workstations PC Segment 2 PC Segment 1 PC Segment 0 Mobile Graphics 2H991H002H001H01 PC100 DDR PC100 DDR PC100 Rambus DDR PC100 PC66 PC100 DDR PC133 SS167 DDR (x16 and x32) DDR 2H01 DDR PC133

4 4 RAM Evolution 320MB/s 400MB/s 1000MB/s 2100MB/s Mainstream Memories FP EDO SDR DDR Simple, incremental steps DDR II 3200MB/s

5 5 Mobile Designs Two Sockets, T-stub Two Sockets, T-stub 133MHz clock (for now) 133MHz clock (for now) 2.1GB/s transfer (for now) 2.1GB/s transfer (for now) Mobile Memory Controller

6 6 Butterfly SO-DIMMs Perfect for notebook Perfect for notebook Especially thin & light! Especially thin & light! Single access door to both SO-DIMMs Single access door to both SO-DIMMs Internet Appliance: 1 or 2 SO-DIMMs Internet Appliance: 1 or 2 SO-DIMMs CPU NB SO-DIMM SOCKET CPU SO-DIMMSOCKET Motherboard

7 7 Mobile Market Requirements Long battery life Long battery life Small form factor Small form factor End-user upgrade End-user upgrade Low power, low heat Low power, low heat

8 8 Power = CV 2 f% Factors: Capacitance (C) Capacitance (C) Voltage (V) Voltage (V) Frequency (f) Frequency (f) Duty cycle (%) Duty cycle (%) Power states Power states Keys to mobile design: Reduce C and V Reduce C and V Match f to demand Match f to demand Minimize duty cycle Minimize duty cycle Utilize power states Utilize power states

9 9 Power: Capacitance DDR capacitance 20% less than SDR DDR capacitance 20% less than SDR Tight circuit board design Tight circuit board design Low parasitic sockets Low parasitic sockets CapacitanceVoltageFrequency Duty cycle Power states

10 10 Power: DDR vs SDR CapacitanceVoltageFrequency Duty cycle Power states PC100 (3.3V) 1.2X PC266 (2.5V) 1.0X PC133 (3.3V) 2.0X Lower Voltage means Lower Power

11 11 Power: DDR vs SDR CapacitanceVoltageFrequency Duty cycle Power states PC100.31X PC X PC133.25X Double the Bandwidth yet Lower Power

12 12 Power: Frequency Memory speed to match task demand Memory speed to match task demand Adjust memory clock for lowest power Adjust memory clock for lowest power Stream back to back operations on open bank, then close Stream back to back operations on open bank, then close DDR burst efficiency really shines DDR burst efficiency really shines CapacitanceVoltageFrequency Duty cycle Power states

13 13 Power: Duty Cycle Caches minimize memory demands Caches minimize memory demands DDR cuts burst time in half DDR cuts burst time in half Get back into low power state sooner Get back into low power state sooner CapacitanceVoltageFrequency Duty cycle Power states

14 14 Long Battery Life Lowest power to perform a task Lowest power to perform a task Desktop performance expected Desktop performance expected Battery extending technologies: Battery extending technologies: SpeedStep TM SpeedStep TM LongRun TM LongRun TM SpeedStep and LongRun are trademarks of Intel Corporation and Transmeta Corporation, respectively

15 15 Introducing LongRun TM CapacitanceVoltageFrequency Duty cycle Power states The number 11 is a trademark of Spinal Tap LongRunSpeedStep

16 16 LongRun TM Technology Smart reprogramming of memory frequency based on demand Smart reprogramming of memory frequency based on demand CPU monitors trends in CPU demand CPU monitors trends in CPU demand Automatically adjust CPU voltage, CPU & memory frequency as needed Automatically adjust CPU voltage, CPU & memory frequency as needed Utilize all memory power states Utilize all memory power states Lowest power state possible Lowest power state possible Close banks between bursts Close banks between bursts CapacitanceVoltageFrequency Duty cycle Power states LongRun is a trademark of Transmeta Corporation

17 17 LongRun TM Advantage CapacitanceVoltageFrequency Duty cycle Power states

18 18 Mobile Market Requirements Long battery life Long battery life Low power, low heat Low power, low heat Small form factor Small form factor End-user upgrade End-user upgrade

19 19 End User Upgrade DDR SO-DIMM Status DDR SO-DIMM Status 63.6 x 31.75mm 63.6 x 31.75mm 200 pins on.60mm centers, staggered 200 pins on.60mm centers, staggered x64 and x72 (ECC) supported x64 and x72 (ECC) supported JEDEC specification votes being counted JEDEC specification votes being counted Multiple mobile designs in progress Multiple mobile designs in progress Samples in test now, production 1Q01 Samples in test now, production 1Q01 Also great for small (Flex ATX) desktop Also great for small (Flex ATX) desktop

20 20Conclusions Memory of choice for the future Memory of choice for the future Enables mobile computing Enables mobile computing Low power yields long battery life Low power yields long battery life Small form factor end-user upgrades Small form factor end-user upgrades Smart power management schemes Smart power management schemes

21 21Summary DDR is here today DDR is here today Double the bandwidth at lower power Double the bandwidth at lower power Evolutionary design change over SDR Evolutionary design change over SDR Applies to all market segments Applies to all market segments Industry Standards Industry Standards Detailed complete data sheet & models Detailed complete data sheet & models Module designs on the web Module designs on the web Visit Visit

22 22 Thank You


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