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IL 2222 - MOSFET Professor Ahmed Hemani Dept. Of ES, School of ICT, KTH Kista Website:

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Presentation on theme: "IL 2222 - MOSFET Professor Ahmed Hemani Dept. Of ES, School of ICT, KTH Kista Website:"— Presentation transcript:

1 IL MOSFET Professor Ahmed Hemani Dept. Of ES, School of ICT, KTH Kista Website:

2 MOS Capacitor, MOSFET Modern Semiconductor Devices for Integrated Circuits (C. Hu) MOS: Metal-Oxide-Semiconductor SiO 2 metal gate Si body VgVg gate P-body N+ N+ MOS capacitor MOS transistor VgVg SiO 2 N+ N+ ~1.5nm thick Few oxide molecules Usually made of Poly Silicon

3 Energy Diagram at V g = 0

4 Flat-band Condition and Flat-band Voltage

5 Surface Accumulation Make V g < V fb s : surface potential, band bending V ox : voltage across the oxide s is neglible in accumulation

6 Surface Depletion ( v g > v fb )

7 Surface Depletion Slide 5-7 Modern Semiconductor Devices for Integrated Circuits (C. Hu)

8 Threshold Condition and Threshold Voltage Threshold (of inversion): n s = N a, or (E c –E f ) surface = (E f – E v ) bulk, or A = B, and C = D Modern Semiconductor Devices for Integrated Circuits (C. Hu)

9 Threshold Voltage At threshold, Modern Semiconductor Devices for Integrated Circuits (C. Hu)

10 Threshold Voltage + for P-body, – for N-body

11 Strong Inversion–Beyond Threshold V g > V t

12 Inversion Layer Charge, Q inv (C/cm 2 ) Modern Semiconductor Devices for Integrated Circuits (C. Hu)

13 Choice of V t and Gate Doping Type V t is generally set at a small positive value So that, at V g = 0, the transistor does not have an inversion layer and current does not flow between the two N + regions. Enhancement type device P-body is normally paired with N + -gate to achieve a small positive threshold voltage. N-body is normally paired with P + -gate to achieve a small negative threshold voltage. Modern Semiconductor Devices for Integrated Circuits (C. Hu)

14 Review : Basic MOS Capacitor Theory Modern Semiconductor Devices for Integrated Circuits (C. Hu)

15 Review : Basic MOS Capacitor Theory total substrate charge, Q s Modern Semiconductor Devices for Integrated Circuits (C. Hu)

16 MOS CV Characteristics Modern Semiconductor Devices for Integrated Circuits (C. Hu)

17 MOS CV Characteristics Modern Semiconductor Devices for Integrated Circuits (C. Hu) The quasi-static CV is obtained by the application of a slow linear- ramp voltage (< 0.1V/s) to the gate, while measuring I g with a very sensitive DC ammeter. C is calculated from I g = C·dV g /dt. This allows sufficient time for Q inv to respond to the slow-changing V g.

18 (a) (b) (c) (d) General case for both depletion and inversion regions. In the depletion regions V g V t Strong inversion Modern Semiconductor Devices for Integrated Circuits (C. Hu) Equivalent circuit in the depletion and the inversion regimes

19 MOSFET Modern Semiconductor Devices for Integrated Circuits (C. Hu) The MOSFET (MOS Field-Effect Transistor) is the building block of Gb memory chips, GHz microprocessors, analog, and RF circuits. MOSFET the following characteristics: small size high speed low power high gain

20 Introduction to the MOSFET Basic MOSFET structure and IV characteristics Modern Semiconductor Devices for Integrated Circuits (C. Hu)

21 Introduction to the MOSFET Two ways of representing a MOSFET: Modern Semiconductor Devices for Integrated Circuits (C. Hu)

22 Complementary MOSFETs Technology Modern Semiconductor Devices for Integrated Circuits (C. Hu)

23 CMOS (Complementary MOS) Inverter Modern Semiconductor Devices for Integrated Circuits (C. Hu)

24 MOSFET V t and the Body Effect Redefine V t as Modern Semiconductor Devices for Integrated Circuits (C. Hu) Two capacitors => two charge components

25 MOSFET V t and the Body Effect Body effect slows down circuits? How can it be reduced? Body effect: V t is a function of V sb. When the source-body junction is reverse-biased, V t increases. Body effect coefficient: = C dep /C oxe = 3T oxe / W dep Modern Semiconductor Devices for Integrated Circuits (C. Hu)

26 Retrograde Body Doping Profiles W dep does not vary with V sb. Retrograde doping is popular because it reduces off-state leakage and allows higher surface mobility. W dmax for uniform doping W dmax for retrograde doping Modern Semiconductor Devices for Integrated Circuits (C. Hu)

27 Uniform Body Doping When the source/body junction is reverse-biased, there are two quasi-Fermi levels (E fn and E fp ) which are separated by qV sb. An NMOSFET reaches threshold of inversion when E c is close to E fn, not E fp. This requires the band-bending to be 2 B + V sb, not 2 B. is the body-effect parameter. Modern Semiconductor Devices for Integrated Circuits (C. Hu)

28 Q inv in MOSFET Channel voltage V cs (x) x = 0: V cs = V s x = L: V cs = V d Q inv = – C oxe (V gs – V cs – V t0 – (V sb +V cs ) = – C oxe (V gs – V cs – (V t0 + V sb ) – V cs ) = – C oxe (V gs – mV cs – V t ) m 1 + = 1 + 3T oxe /W dmax m is called the bulk-charge factor Typically m is 1.2 but can be simplified to 1 Modern Semiconductor Devices for Integrated Circuits (C. Hu)

29 How to Measure the V t of a MOSFET ? Method A. V t is measured by extrapolating the I ds versus V gs curve to I ds = 0. Method B. The Vg at which Ids =0.1 A W/L A B Modern Semiconductor Devices for Integrated Circuits (C. Hu)

30 Basic MOSFET IV Model I ds = WQ inv v= WQ inv n E = WC ox (V gs – mV cs – V t ) n dV cs /dx I ds L = WC ox n (V gs – V t – mV ds /2)V ds Modern Semiconductor Devices for Integrated Circuits (C. Hu) Process Transconductance Gain factor m is typically 1.2 but can be simplified to 1

31 V dsat : Drain Saturation Voltage Modern Semiconductor Devices for Integrated Circuits (C. Hu)

32 Saturation Current and Transconductance Transconductance: g m = dI ds /dV gs Drain current in saturation region Modern Semiconductor Devices for Integrated Circuits (C. Hu)

33 Saturation – Pinch Off

34 Channel Length Modulation Increasing the V ds has the effect of the reducing the channel length as the depletion region on the drain side increases. Channel length reduction lower resistance Increase in Drain Current More pronounced for short channels One of the five short channel effects

35 Velocity Saturation sat n v E E E 1 Velocity saturation has large and deleterious effect on the I on of MOSFETS E << E sat : v = E n E >> E sat : v = E sat n Modern Semiconductor Devices for Integrated Circuits (C. Hu) (V/µm) c = 1.5 n ( m / s ) sat = 10 5 Constant mobility (slope = µ) Constant velocity

36 MOSFET IV Model with Velocity Saturation invds vWQI sat ds tgsnsoxeds E VIVV m VVWCLI/) 2 ( cssat LV dstcsgsnsoxeds dV E IVmVVWCdxI ds ]/)([ 00 sat cs ns tcsgsoxeds E dx dV dxdV VmVVWCI / 1 / )( Modern Semiconductor Devices for Integrated Circuits (C. Hu) V cs /L– the average electric field is replaced by

37 MOSFET IV Model with Velocity Saturation L E V VV m VVC L W I sat ds tgsnsoxe ds 1 ) 2 ( L E V Ichannel-long I sat ds /1 Modern Semiconductor Devices for Integrated Circuits (C. Hu)

38 MOSFET IV Model with Velocity Saturation LmEmE VV mVV V sat tgs t dsat /)(211 /)(2 dV dI ds,0Solving L E VV m V sat tgsdsat 11 ns dsat sat v E 2 A simpler and more accurate V dsat is: Modern Semiconductor Devices for Integrated Circuits (C. Hu)

39 EXAMPLE: Drain Saturation Voltage Question: At V gs = 1.8 V, what is the V dsat of an NFET with T oxe = 3 nm, V t = 0.25 V, and W dmax = 45 nm for (a) L =10 m, (b) L = 1 um, (c) L = 0.1 m, and (d) L = 0.05 m? Solution: From V gs, V t, and T oxe, ns is 200 cm 2 V -1 s -1. E sat = 2v sat / ns = V/cm m = 1 + 3T oxe /W dmax = L E VV m V sat tgs dsat Modern Semiconductor Devices for Integrated Circuits (C. Hu)

40 (a) L = 10 m, V dsat = (1/1.3V + 1/80V) -1 = 1.3 V (b) L = 1 m, V dsat = (1/1.3V + 1/8V) -1 = 1.1 V (c) L = 0.1 m, V dsat = (1/1.3V + 1/.8V) -1 = 0.5 V (d) L = 0.05 m, V dsat = (1/1.3V + 1/.4V) -1 = 0.3 V EXAMPLE: Drain Saturation Voltage 1 L E VV m V sat tgs dsat 1 Modern Semiconductor Devices for Integrated Circuits (C. Hu)

41 I dsat with Velocity Saturation Substituting V dsat for V ds in I ds equation gives: L mEmE VV Ichannel-long L mEmE VV VV C mL W I sat tgs dsat sat tgs t soxdsat 11 )( 2 2 Very short channel case: tgssat VVL E ) (VVCWv I tgsoxsat dsat I dsat is proportional to V gs –V t rather than (V gs – V t ) 2, not as sensitive to L )(L mEmE VVCWvWv I sat tgsoxsat dsat Modern Semiconductor Devices for Integrated Circuits (C. Hu)

42 Current-Voltage Relations A good ol transistor Quadratic Relationship x V DS (V) I D (A) VGS= 2.5 V VGS= 2.0 V VGS= 1.5 V VGS= 1.0 V ResistiveSaturation V DS = V GS - V T

43 Velocity Saturation Long-channel device Short-channel device I D V DS V DSAT V GS - V T V GS = V DD The Short Channel Device enters saturation before V DS > V GS - V T The I DSAT in short Channel Device has linear dependence on V GS as opposed to square dependence thus significantly reducing the drain current delivered for a given voltage and thus slows down the device

44 Velocity Saturation What is the main difference between the V g dependence of the long- and short-channel length IV curves? Modern Semiconductor Devices for Integrated Circuits (C. Hu)

45 Sub-Threshold Conduction V GS (V) I D (A) VTVT Linear Exponential Quadratic Typical values for S: mV/decade The Slope Factor S is V GS for I D2 /I D1 =10

46 A Unified Model x V DS (V) I D (A) Velocity Saturated Linear Saturated V DSAT =V GT V DS =V DSAT V DS =V GT S D G B

47 Transistor Model for Manual Analysis

48 The Transistor as a Switch

49

50 Dynamic Behavior of MOS Transistor

51 The Gate Capacitance t ox n + n + Cross section L Gate oxide x d x d L d Polysilicon gate Top view Gate-bulk overlap Source n + Drain n + W

52 Gate Capacitance Cut-off ResistiveSaturation Most important regions in digital design: saturation and cut-off

53 Gate Capacitance Capacitance as a function of VGS (with VDS = 0) Capacitance as a function of the degree of saturation

54 Diffusion Capacitance Bottom Side wall Channel Source N D Channel-stop implant N A 1 SubstrateN A W x j L S

55 Capacitances in 0.25 m CMOS process

56 MOSFET – Some Secondary Effects V T L Long-channel threshold LowV DS threshold Threshold as a function of the length (for lowV DS ) Drain-induced barrier lowering (for lowL) V DS V T

57 Parasitic Resistances W L D Drain contact Polysilicon gate R G D S D V GS,eff RSRS RDRD R S,D = R L S,D /W + R C

58 Three Levels – Level 1 Long Channel, Channel Length Modulation – Level 2 Geometry based that includes detailed device physics Velocity saturation, mobility degradation, DIBL Analytical physics based model makes it complex and inaccurate – Level 3 Semi-empirical model Measured data to calibrate and decide the main parameters Accurate and efficient. Widely used. SPICE Models for the MOS Transistor

59 BSIM3-V3 Parameter CategoryDescription ControlSelection of level and models for mobility, capacitance and noise DCParameters for threshold and current and calculations AC & CapacitanceParameters for capacitance computations dW and dLDerivation of effective channel length and width ProcessProcess parameters such as oxide thickness and doping concentrations TOX, XJ, GAMMA1, NCH, NSUB TemperatureNominal temperature and temperature coefficients for various device parameters TNOM BinBounds device dimensions for which the model is valid LMIN, LMAX, WMIN, WMAX Flicker NoiseNoise model parameters

60 SPICE Transistor Parameters Parameter NameSymbolSPICE Name UnitsDefault Value Drawn LengthLLm- Effective WidthWWm- Source AreaAREAASm2m2 0 Drain AreaAREAADm2m2 0 Source PerimeterPERIMPSm0 Drain PerimeterPERIMPDm0 Squares of Source DiffusionNRS-1 Squares of Drain DiffusionNRD-1


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