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**Chapter 3 Digital Logic Structures**

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**Transistor: Building Block of Computers**

Microprocessors contain millions of transistors Intel Pentium II: 7 million Compaq Alpha 21264: 15 million Intel Pentium III: 28 million Intel Pentium4: 55 Million Intel Core 2 Duo: 291 Million Logically, each transistor acts as a switch Combined to implement logic functions AND, OR, NOT Combined to build higher-level structures Adder, multiplexor, decoder, register, … Combined to build processor LC-3

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**Transistors http://www.brew-wood.co.uk/computers/transistor.htm**

First transistor: Bell Labs in 1947; developed by J. Bardeen, W. Shockley & W. Brattain A 2011 processor with 1.17 billion transistors positioned in 240 sq. millimeters

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**Simple Switch Circuit Switch open: Switch closed:**

No current through circuit Light is off Vout is +2.9V Switch closed: Short circuit across switch Current flows Light is on Vout is 0V Switch-based circuits can easily represent two states: on/off, open/closed, voltage/no voltage.

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**N-type MOS Transistor MOS = Metal Oxide Semiconductor N-type Gate = 1**

two types: N-type and P-type N-type when Gate has positive voltage, short circuit between #1 and #2 (switch closed) when Gate has zero voltage, open circuit between #1 and #2 (switch open) Gate = 1 Drain Animation Gate = 0 Source GND Terminal #2 must be connected to GND (0V). GND

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**P-type MOS Transistor P-type is complementary to N-type Gate = 1 +2.9V**

when Gate has positive voltage, open circuit between #1 and #2 (switch open) when Gate has zero voltage, short circuit between #1 and #2 (switch closed) Gate = 1 +2.9V GND Source Gate = 0 Drain Terminal #1 must be connected to +2.9V.

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**CMOS Circuit Complementary MOS**

Uses both N-type and P-type MOS transistors P-type Attached to + voltage Pulls output voltage UP when input is zero N-type Attached to GND Pulls output voltage DOWN when input is one For all inputs, make sure that output is either connected to GND or to +, but not both!

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**Inverter (NOT Gate) High Voltage Truth table Ground In Out 0 V 2.9 V**

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Logical Operations In 1850, George Boole developed Boolean Algebra showing that all logical functions can be performed with just 3 operations (AND, OR & NOT). In 1937, Claude Shannon showed that Boolean Algebra could be applied to circuit design.

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**NOR Gate (NOT OR) High Voltage Ground A B C 1**

1 Ground Note: Serial structure on top, parallel on bottom.

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OR Gate A B C 1 Add inverter to NOR.

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**NAND Gate (NOT-AND) A B C 1**

1 Note: Parallel structure on top, serial on bottom.

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AND Gate A B C 1 Add inverter to NAND.

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Basic Logic Gates

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**More than 2 Inputs? AND/OR can take any number of inputs.**

AND = 1 if all inputs are 1. OR = 1 if any input is 1. Similar for NAND/NOR. An AND gate with k inputs is called and ANDk gate (e.g., an AND2, AND3, etc). Can implement AND3 with multiple AND2 gates, or with single transistor circuit. AND/OR are associative and commutative -- combine in any order. NAND and NOR are not associative. Jim Conrad’s example: NAND(NAND(0,0), 1) = NAND(1, 1) = 0 NAND(0, NAND(0,1)) = NAND(0, 0) = 1

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**Logical Completeness Can implement ANY truth table with AND, OR, NOT.**

1 AND combinations that yield a "1" in the truth table. Put a “bubble” (inverter) for every 0, a straight-in for every 1 in a row 2. OR the results of the AND gates. If there are N 1’s, there will be N and gates; the or gate will have N inputs Note the use of the bubbles (NOT) in the input.

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**invert inputs and output.**

DeMorgan's Law Converting AND to OR (with some help from NOT) Consider the following gate: To convert AND to OR (or vice versa), invert inputs and output. A B 1 If there's time, perhaps discuss how all gates can be implemented with NAND (or NOR). Therefore, you can implement any truth table using only NAND (or NOR) gates. Same as A OR B!

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Summary MOS transistors are used as switches to implement logic functions. N-type: connect to GND, turn on (with 1) to pull down to 0 P-type: connect to +2.9V, turn on (with 0) to pull up to 1 Basic gates: NOT, NOR, NAND Logic functions are usually expressed with AND, OR, and NOT Properties of logic gates Completeness can implement any truth table with AND, OR, NOT DeMorgan's Law convert AND to OR by inverting inputs and output

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PART 3 Digital Logic 1.Logic Gates 2.Logic Circuits 3.Memory 4.Sequential Circuits 5.LC-3 Data Path.

PART 3 Digital Logic 1.Logic Gates 2.Logic Circuits 3.Memory 4.Sequential Circuits 5.LC-3 Data Path.

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