Presentation on theme: "Chapter3: Gate-Level Minimization Part 2"— Presentation transcript:
1Chapter3: Gate-Level Minimization Part 2 Originally Reham S. Al-MajedImam Muhammad Bin Saud University
2Outline Don’t-Care Conditions NAND – NOR implementation. Exclusive-OR Function
3Don’t Care ConditionsMinterms associated with a function specifies the conditions under which the function is equal to 1.The function is equal to 0 for the rest.In some applications, the function is not specified for certain combinations of the variables (e.g. BCD)Incompletely specified functions: are functions that have unspecified outputs for some input combinations.Unspecified minterms of a function are called don’t-care conditions
4Don’t Care Conditions (cont.) Don’t-care conditions can be used for further simplification.Marked with an X in the map.In choosing adjacent squares to simplify the function in a map, the don’t-care minterms may be assumed to be either 0 or 1.Example: Simplify the Boolean function:F(w,x,y,z) = ∑(1,3,7,11,15)d(w,x,y,z)= ∑(0,2,5)F=yz+w’x’F=yz+w’z
5NAND-NOR Implementation Digital circuits uses NAND or NOR rather than AND and OR gates.Easier to fabricate with electronic components and are the basic gates used in all IC digital logic families.They are called universal gatesAny Boolean function can be implemented with them.
6NAND CircuitThe NAND gate represents the complement of the AND operationAbbreviation of Not ANDTwo equivalent graphic symbols for the NAND gate:Can implement any digital systems.NOT GateAND GateOR Gate
7NAND Circuit (Cont.)The implementation of Boolean functions with NAND gate requires that the function be in SoP formProcedure :Simplify and express the function in SoP.Draw a NAND gate for each product term containing at least 2 literal. ( first-level gates)Draw single NAND gate in the second level with outputs of first-level gates.A term with a single literal requires inverter.
8ExampleImplement the following functions with NAND gatesF= AB+CD
9Multilevel NAND Circuits If we choose to implement the function as a mixed notation (without reducing the expression into a SoP form)The procedure isto change every AND gate to an AND-invert graphic symboland every OR gate to an invert-OR symbol .Make sure that there are two bubbles along the same line
10Implement the following functions with NAND gates. ExampleImplement the following functions with NAND gates.F = A(CD + B)+ B C’F = (AB+ AB )(C+D)(page )
11NOR ImplementationThe NOR gate represents the complement of the OR operationAbbreviation of Not ORTwo graphic symbolsCan implement any digital systems
12NOR Circuit (Cont.)A two-level implementation with NOR gate requires that the function be simplified into PoS formProcedure :Simplify and express the function in SoP.Draw a NOR gate (OR-invert symbol) for each sum term containing at least 2 literal. ( first-level gates)Draw single NOR gate (invert-AND symbol)in the second level with outputs of first-level gates.A term with a single literal requires inverter.
13Implement the following function with NOR gates. ExampleImplement the following function with NOR gates.F = (A + B)(C + D)E
14Multilevel NOR Circuits The procedure for converting a multilevel AND-OR diagram to an all-NOR diagram isto change every AND gate to an invert-AND graphic symboland every OR gate to an OR-invert symbol .Make sure that there are two bubbles along the same line
15Implement the following functions with NOR gates. ExampleImplement the following functions with NOR gates.F = (AB+ AB )(C+D)(page 111)
16(XOR) Exclusive-OR function x 0 = xx 1 = xx x = 0x x = 1Commutative and associative
17XOR implementationA two-input XOR function is constructed with conventional gatesOr with NAND gates
18Odd Function Example : Three variables F = (1,2,4,7) The multiple- variable XOR is an odd function: it is equal to 1 if the inputs variables have an odd number of 1's.Example : Three variablesF = (1,2,4,7)Figure input XOR gate
19(XOR) Exclusive-OR function Only a limited number of Boolean functions can be expressed in terms of XOR operations. Nevertheless, this function is particularly useful in arithmetic operations , error detection and correction circuits.Parity Generation and Checking (page num 120)