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Day - 3 EL-313: Samar Ansari. INTEGRATED CIRCUITS Integrated Circuit Design Methodology EL-313: Samar Ansari Programmable Logic Programmable Array Logic.

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Presentation on theme: "Day - 3 EL-313: Samar Ansari. INTEGRATED CIRCUITS Integrated Circuit Design Methodology EL-313: Samar Ansari Programmable Logic Programmable Array Logic."— Presentation transcript:

1 Day - 3 EL-313: Samar Ansari

2 INTEGRATED CIRCUITS Integrated Circuit Design Methodology EL-313: Samar Ansari Programmable Logic Programmable Array Logic (PAL) Programmable Logic Arrays (PLA) Complex Programmable Logic Devices (CPLD) Gate Array & Sea-of-Gates Design (SOG) Field-Programmable Gate Arrays (FPGA) Field-Programmable Analog Arrays (FPAA) Standard Cell based design Semi Custom Design Full Custom Design Application Specific Integrated Circuits (ASIC)

3 INTEGRATED CIRCUITS Programmable Logic Arrays (PLA) EL-313: Samar Ansari Programmable device used to implement combinational logic circuits. Set of programmable AND gate planes, which link to a set of programmable OR gate planes This layout allows for a large number of logic functions to be synthesized in the sum of products (and sometimes product of sums) canonical forms.

4 INTEGRATED CIRCUITS Programmable Array Logic (PAL) EL-313: Samar Ansari Programmable device used to implement combinational logic circuits. Set of programmable AND gate planes, which link to a set of fixed OR gate planes Not programmable Programmable Memory Aid PAL: Programmable AND Logic

5 INTEGRATED CIRCUITS Complex Programmable Logic Devices (CPLD) EL-313: Samar Ansari Complexity between that of PALs and FPGAs Architectural features of both Building block of a CPLD is the macrocell, which contains logic implementing disjunctive normal form expressions and more specialized logic operations. An Altera MAX series CPLD with 2500 gates.

6 INTEGRATED CIRCUITS Standard Cell Design EL-313: Samar Ansari A standard cell is a group of transistor and interconnect structures that provides a boolean logic function (e.g., AND, OR, XOR, XNOR, inverters) or a storage function (flip-flop or latch). These cells are realized as fixed-height, variable-width full-custom cells. The key aspect with these libraries is that they are of a fixed height, which enables them to be placed in rows, easing the process of automated digital layout. A standard-cell library may also contain the following additional components: A full layout of the cells Spice models of the cells Verilog models or VHDL models Parasitic Extraction models DRC information

7 INTEGRATED CIRCUITS Gate Array & Sea-of-Gates (SOG) EL-313: Samar Ansari A gate array circuit is a prefabricated silicon chip circuit with no particular function in which transistors, standard NAND or NOR logic gates, and other active devices are placed at regular predefined positions and manufactured on a wafer Creation of a circuit with a specified function is accomplished by adding a final surface layer or layers of metal interconnects to the chips

8 INTEGRATED CIRCUITS Field-Programmable Gate Arrays (FPGA) EL-313: Samar Ansari Contain programmable logic components called "logic blocks Reconfigurable interconnects that allow the blocks to be "wired together"somewhat like a one- chip programmable breadboard. Logic blocks can be configured to perform complex combinational functions, or merely simple logic gates like AND and XOR. In most FPGAs, the logic blocks also include memory elements, which may be simple flip-flops or more complete blocks of memory

9 INTEGRATED CIRCUITS Field-Programmable Analog Arrays (FPAA) EL-313: Samar Ansari Configurable analog blocks (CAB) Reconfigurable interconnects that allow the blocks to be "wired together"somewhat like a one- chip programmable breadboard. For voltage mode devices, each block usually contains an operational amplifier in combination with programmable configuration of passive components.

10 INTEGRATED CIRCUITS ASIC Design EL-313: Samar Ansari An application-specific integrated circuit (ASIC) is an integrated circuit customized for a particular use, rather than intended for general-purpose use. As feature sizes have shrunk and design tools improved over the years, the maximum complexity (and hence functionality) possible in an ASIC has grown from 5,000 gates to over 100 million. Modern ASICs often include entire 32-bit processors, memory blocks including ROM, RAM, EEPROM, Flash and other large building blocks. Such an ASIC is often termed a SoC (system-on-a-chip). One of the two ASICs on the board the Apple QuickDraw 3D Accelerator Card that handle graphics and the PCI interface.


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