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**EET 1131 Unit 3 Basic Logic Gates**

Read Kleitz, Chapter 3. Homework #3 and Lab #3 due next week. Quiz next week. -Take Quiz #2 and fire up Multisim. -Handouts: Slide #21 (from Floyd) -Logic gates as basic building blocks in digital (even though constructed from transistors and resistors). -This week we look at 5 basic gates: inverter, AND, OR, NAND, NOR.

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A X The Inverter The inverter performs the Boolean NOT operation. When the input is LOW (0), the output is HIGH (1); when the input is HIGH, the output is LOW. -Truth table: table showing the output values for all possible combinations of input values. -3 ways to describe a digital circuit: schematic diagram, truth table, Boolean expression. (Use Example 5-19 on p. 186.) The NOT operation (complement) is shown with an overbar. Thus, the Boolean expression for an inverter is X = A.

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A X The Inverter Example waveforms: A X

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A A X The AND Gate X B B The AND gate produces a HIGH output when all inputs are HIGH; otherwise, the output is LOW. For a 2-input gate, the truth table is 0 0 0 1 1 0 1 1 1 -AND can have more than two inputs. Draw truth table & Boolean expression for 3-input. The AND operation is usually shown with a dot between the variables but it may be implied (no dot). Thus, the AND operation is written as X = A .B or X = AB.

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A A X The AND Gate X B B Example waveforms: A B X

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**Example Solution The AND Gate**

A Multisim circuit is shown. XWG1 is a word generator set in the count down mode. XLA1 is a logic analyzer with the output of the AND gate connected to first (upper) line of the analyzer. What signal do you expect to on this line? Solution The output (line 1) will be HIGH only when all of the inputs are HIGH.

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A X A X The OR Gate B B The OR gate produces a HIGH output if any input is HIGH; if all inputs are LOW, the output is LOW. For a 2-input gate, the truth table is 0 0 0 1 1 0 1 1 1 -OR can have more than two inputs. Draw truth table & Boolean expression for 3-input. The OR operation is shown with a plus sign (+) between the variables. Thus, the OR operation is written as X = A + B.

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A X A X The OR Gate B B Example waveforms: A B X

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**Example Solution The OR Gate**

A Multisim circuit is shown. XWG1 is a word generator set to count down. XLA1 is a logic analyzer with the output Example connected to first (top) line of the analyzer. The three 2-input OR gates act as a single 4-input gate. What signal do you expect on the output line? The output (line 1) will be HIGH if any input is HIGH; otherwise it will be LOW. Solution

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A A X The NAND Gate X B B The NAND gate produces a LOW output when all inputs are HIGH; otherwise, the output is HIGH. For a 2-input gate, the truth table is 0 0 0 1 1 0 1 1 1 -NAND can have more than two inputs. Draw truth table & Boolean expression for 3-input. The NAND operation is shown with a dot between the variables and an overbar covering them. Thus, the NAND operation is written as X = A .B (Alternatively, X = AB.)

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**The NAND Gate Example waveforms: A B X**

The NAND gate is particularly useful because it is a “universal” gate – all other basic gates can be constructed from NAND gates.

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**Example Solution The NAND Gate**

A Multisim circuit is shown. XWG1 is a word generator set in the count up mode. A four-channel oscilloscope monitors the inputs and output. What output signal do you expect to see? Solution The output (channel D) will be LOW only when all of the inputs are HIGH. Inputs

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A X A X The NOR Gate B B The NOR gate produces a LOW output if any input is HIGH; if all inputs are LOW, the output is HIGH. For a 2-input gate, the truth table is 0 0 0 1 1 0 1 1 1 -NOR can have more than two inputs. Draw truth table & Boolean expression for 3-input. The NOR operation is shown with a plus sign (+) between the variables and an overbar covering them. Thus, the NOR operation is written as X = A + B.

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**The NOR Gate Example waveforms: A B X**

The NOR operation will produce a LOW if any input is HIGH. Intro lab by demo-ing test of AND gate on breadboard and in Multisim.

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**Enable/Disable Using AND Gate**

Before this slide, review truth tables of basic gates. 14

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**Enable/Disable Using OR Gate**

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**Cutaway view of DIP (Dual-In-line Package) chip:**

Integrated Circuits Cutaway view of DIP (Dual-In-line Package) chip: -Notice that the actual semiconductor chip is much smaller than the package. The TTL series, available as DIPs are popular for laboratory experiments with logic.

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**DIP chips and surface mount chips**

Integrated Circuits DIP chips and surface mount chips Pin 1 -A DIP is much larger than a SOIC that performs comparable function. Pass around circuit board with both DIPs (THT) and SMT chips. Dual in-line package Small outline IC (SOIC)

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Integrated Circuits Chip Densities: Small scale integration (SSI): <=10 gates per chip. Medium-scale integration (MSI): 10 to 100 gates per chip. Large-scale integration (LSI): 100 to 10,000 gates per chip. Very large-scale integration (VLSI): 10,000 to 100,000 gates per chip.

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Programmable Logic Programmable logic devices (PLDs) are an alternative to fixed function devices. The logic can be programmed for a specific purpose. In general, they cost less and use less board space than fixed function devices.

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**Figure 3.50 Pin configuration diagrams for some common gate configurations.**

-Have them ID each chip as, e.g., quad 2-input NAND. -Usually, top left pin in Vcc (+5 V) and bottom right pin in Ground. -Go to ti.com to find data sheet for any part #.

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**Website for Datasheets**

Many websites have datasheets for logic chips. The best site is Texas Instruments: Type the chip number (such as 7404) in the Search box. For some chips, the original part number is obsolete and no longer available. In such cases, inserting LS often works. Example: 74LS10.

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Troubleshooting Troubleshooting means finding and fixing faults in a circuit or system that’s not working correctly. Your first step in troubleshooting a digital circuit on the breadboard should always be to verify that the voltage at each chip’s power and ground pins are actually +5 V and 0V. After that, use your knowledge of truth tables to find the gates that are not producing the correct outputs. -Book discusses how to isolate problem to input or output of a gate. That’s good, but may just need to be able to identify broken gates.

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**Multisim Troubleshooting**

Multisim lets you insert the following kinds of faults into digital components: An open pin Two pins shorted together A pin shorted to VCC (constant HIGH) A pin shorted to ground (constant LOW) Your book has Multisim troubleshooting problems that I’ll assign on some homeworks. You can download the files for these from the book’s website. To troubleshoot them, attach switches to input pins and probes to output pins. Demo with a 1k resistor and an ohmeter. -Have them ID broken gates in Multisim exercises E3-14, E3-15. 24

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© 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights ReservedFloyd, Digital Fundamentals, 10 th ed Digital Logic Design Dr. Oliver Faust.

© 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights ReservedFloyd, Digital Fundamentals, 10 th ed Digital Logic Design Dr. Oliver Faust.

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