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Floyd, Digital Fundamentals, 10 th ed EET 1131 Unit 3 Basic Logic Gates Read Kleitz, Chapter 3. Homework #3 and Lab #3 due next week. Quiz next week.

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Presentation on theme: "Floyd, Digital Fundamentals, 10 th ed EET 1131 Unit 3 Basic Logic Gates Read Kleitz, Chapter 3. Homework #3 and Lab #3 due next week. Quiz next week."— Presentation transcript:

1 Floyd, Digital Fundamentals, 10 th ed EET 1131 Unit 3 Basic Logic Gates Read Kleitz, Chapter 3. Homework #3 and Lab #3 due next week. Quiz next week.

2 © 2009 Pearson Education, Upper Saddle River, NJ All Rights ReservedFloyd, Digital Fundamentals, 10 th ed The inverter performs the Boolean NOT operation. When the input is LOW (0), the output is HIGH (1); when the input is HIGH, the output is LOW. The Inverter AX The NOT operation (complement) is shown with an overbar. Thus, the Boolean expression for an inverter is X = A.

3 © 2009 Pearson Education, Upper Saddle River, NJ All Rights ReservedFloyd, Digital Fundamentals, 10 th ed The Inverter Example waveforms: A X AX

4 © 2009 Pearson Education, Upper Saddle River, NJ All Rights ReservedFloyd, Digital Fundamentals, 10 th ed The AND gate produces a HIGH output when all inputs are HIGH; otherwise, the output is LOW. For a 2-input gate, the truth table is The AND Gate The AND operation is usually shown with a dot between the variables but it may be implied (no dot). Thus, the AND operation is written as X = A. B or X = AB A B X A B X

5 © 2009 Pearson Education, Upper Saddle River, NJ All Rights ReservedFloyd, Digital Fundamentals, 10 th ed Example waveforms: A X The AND Gate A B X B A B X

6 © 2009 Pearson Education, Upper Saddle River, NJ All Rights ReservedFloyd, Digital Fundamentals, 10 th ed The AND Gate A Multisim circuit is shown. XWG1 is a word generator set in the count down mode. XLA1 is a logic analyzer with the output of the AND gate connected to first (upper) line of the analyzer. What signal do you expect to on this line? The output (line 1) will be HIGH only when all of the inputs are HIGH.

7 © 2009 Pearson Education, Upper Saddle River, NJ All Rights ReservedFloyd, Digital Fundamentals, 10 th ed The OR gate produces a HIGH output if any input is HIGH; if all inputs are LOW, the output is LOW. For a 2-input gate, the truth table is The OR Gate The OR operation is shown with a plus sign (+) between the variables. Thus, the OR operation is written as X = A + B A B XA B X

8 © 2009 Pearson Education, Upper Saddle River, NJ All Rights ReservedFloyd, Digital Fundamentals, 10 th ed Example waveforms: A X The OR Gate B A B XA B X

9 © 2009 Pearson Education, Upper Saddle River, NJ All Rights ReservedFloyd, Digital Fundamentals, 10 th ed The OR Gate A Multisim circuit is shown. XWG1 is a word generator set to count down. XLA1 is a logic analyzer with the output The output (line 1) will be HIGH if any input is HIGH; otherwise it will be LOW. connected to first (top) line of the analyzer. The three 2-input OR gates act as a single 4-input gate. What signal do you expect on the output line?

10 © 2009 Pearson Education, Upper Saddle River, NJ All Rights ReservedFloyd, Digital Fundamentals, 10 th ed The NAND gate produces a LOW output when all inputs are HIGH; otherwise, the output is HIGH. For a 2-input gate, the truth table is The NAND Gate A B X A B X The NAND operation is shown with a dot between the variables and an overbar covering them. Thus, the NAND operation is written as X = A. B (Alternatively, X = AB.)

11 © 2009 Pearson Education, Upper Saddle River, NJ All Rights ReservedFloyd, Digital Fundamentals, 10 th ed Example waveforms: A X The NAND gate is particularly useful because it is a universal gate – all other basic gates can be constructed from NAND gates. The NAND Gate B A B X A B X

12 © 2009 Pearson Education, Upper Saddle River, NJ All Rights ReservedFloyd, Digital Fundamentals, 10 th ed The NAND Gate A Multisim circuit is shown. XWG1 is a word generator set in the count up mode. A four-channel oscilloscope monitors the inputs and output. What output signal do you expect to see? The output (channel D) will be LOW only when all of the inputs are HIGH. Inputs

13 © 2009 Pearson Education, Upper Saddle River, NJ All Rights ReservedFloyd, Digital Fundamentals, 10 th ed The NOR gate produces a LOW output if any input is HIGH; if all inputs are LOW, the output is HIGH. For a 2-input gate, the truth table is The NOR Gate A B XA B X The NOR operation is shown with a plus sign (+) between the variables and an overbar covering them. Thus, the NOR operation is written as X = A + B.

14 © 2009 Pearson Education, Upper Saddle River, NJ All Rights ReservedFloyd, Digital Fundamentals, 10 th ed Example waveforms: A X The NOR operation will produce a LOW if any input is HIGH. The NOR Gate B A B XA B X

15 Floyd, Digital Fundamentals, 10 th ed Enable/Disable Using AND Gate 14

16 Floyd, Digital Fundamentals, 10 th ed Enable/Disable Using OR Gate 15

17 © 2009 Pearson Education, Upper Saddle River, NJ All Rights ReservedFloyd, Digital Fundamentals, 10 th ed Integrated Circuits Cutaway view of DIP (Dual-In-line Package) chip: The TTL series, available as DIPs are popular for laboratory experiments with logic.

18 © 2009 Pearson Education, Upper Saddle River, NJ All Rights ReservedFloyd, Digital Fundamentals, 10 th ed Integrated Circuits DIP chips and surface mount chips Pin 1 Dual in-line package Small outline IC (SOIC)

19 © 2009 Pearson Education, Upper Saddle River, NJ All Rights ReservedFloyd, Digital Fundamentals, 10 th ed Integrated Circuits Chip Densities: Small scale integration (SSI): <=10 gates per chip. Medium-scale integration (MSI): 10 to 100 gates per chip. Large-scale integration (LSI): 100 to 10,000 gates per chip. Very large-scale integration (VLSI): 10,000 to 100,000 gates per chip.

20 © 2009 Pearson Education, Upper Saddle River, NJ All Rights ReservedFloyd, Digital Fundamentals, 10 th ed Programmable Logic Programmable logic devices (PLDs) are an alternative to fixed function devices. The logic can be programmed for a specific purpose. In general, they cost less and use less board space than fixed function devices.

21 Copyright ©2009 by Pearson Higher Education, Inc. Upper Saddle River, New Jersey All rights reserved. Digital Fundamentals, Tenth Edition Thomas L. Floyd Figure 3.50 Pin configuration diagrams for some common gate configurations.

22 Floyd, Digital Fundamentals, 10 th ed Website for Datasheets Many websites have datasheets for logic chips. The best site is Texas Instruments: Type the chip number (such as 7404) in the Search box. For some chips, the original part number is obsolete and no longer available. In such cases, inserting LS often works. Example: 74LS10.

23 © 2009 Pearson Education, Upper Saddle River, NJ All Rights ReservedFloyd, Digital Fundamentals, 10 th ed Troubleshooting means finding and fixing faults in a circuit or system thats not working correctly. Your first step in troubleshooting a digital circuit on the breadboard should always be to verify that the voltage at each chips power and ground pins are actually +5 V and 0V. After that, use your knowledge of truth tables to find the gates that are not producing the correct outputs. Troubleshooting

24 Multisim lets you insert the following kinds of faults into digital components: An open pin Two pins shorted together A pin shorted to V CC (constant HIGH) A pin shorted to ground (constant LOW) Your book has Multisim troubleshooting problems that Ill assign on some homeworks. You can download the files for these from the books website.website To troubleshoot them, attach switches to input pins and probes to output pins. Multisim Troubleshooting


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