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Digital Systems © Korea Univ. of Tech. & Edu. Dept. of Info. & Comm. Chap. 3 Logic Gates/Boolean Algebra 3-1 Chap. 3 Logic Gates and Boolean Algebra n Logic Gates : the basic elements of logic circuits(AND, OR, NOT,...) n Boolean Algebra A tool for the analysis and design of digital systems Describes relationship between logic circuits inputs and outputs Used to help simplify a logic circuit n 3-1 Boolean constants and variables Only two possible values(Many different terms used synonymously) Logic level l 0 and 1 do not present actual numbers but instead represent the state of a voltage variable n 3-2 Truth tables Describing how a logic circuits output depends on the logic level of circuits input(2 N possible inputs) Fig. 3-1 Truth Table (2, 3, 4 inputs) ? ABAB x Tab. 3-1Fig. 3-1 (a) (b)(c)
Digital Systems © Korea Univ. of Tech. & Edu. Dept. of Info. & Comm. Chap. 3 Logic Gates/Boolean Algebra 3-2 n 3-3 OR Operation with OR gates Output x is a logic 1 if one or more inputs are 1( Fig. 3-2(a) ) Boolean expression : x = A + B l x= = 1, l x = = 1, l x = …+ 1 = 1 OR Gate : Fig. 3-2(b) Multiple input OR Gate : Fig. 3-3 Exam. 3-1 : Alarm is activated if temperature or pressure exceed a reference Exam. 3-2 : Determine the OR gate output in Fig. 3-5 Exam. 3-3 : Same time transition in A and B input, Glitch or Spike n 3-4 AND Operation with AND gates Output x is 1 only when all inputs are 1 Boolean expression : x = AB = AB OR Gate : Fig. 3-7(b) Multiple input OR Gate : Fig. 3-8 Exam. 3-4, 3-5A, 3-5B Fig. 3-2 Truth Table and SymbolFig. 3-3 Three-input OR ABAB ABCABC X= A+B X= A+B+C X= AB ABAB Fig. 3-7 Truth Table and Symbol X= ABC ABCABC Fig. 3-8 Three-input AND
Digital Systems © Korea Univ. of Tech. & Edu. Dept. of Info. & Comm. Chap. 3 Logic Gates/Boolean Algebra 3-3 n 3-5 NOT Operation Single input operation, Complement of input NOT operation : x= A NOT circuit : Inverter( Fig. 3-11(b) ) n 3-6 Describing Logic Circuits Algebraically Boolean logic can describe any logic circuit by Boolean expression. Order of precedence : Parentheses, NOT, AND, OR Fig. 3-12, 13, 14, 15 n 3-7 Evaluating Logic Circuit Output Given a Boolean expression l Evaluate output for given inputs Exam. : Fig. 3-15(a) »A=0, B=1, C=1, D=1 Exam. : Fig. 3-15(b) »A=0, B=0, C=1, D=1, E=1 Fig Truth Table, Symbol, waveform A X= A 1 A 0 1 x 0
Digital Systems © Korea Univ. of Tech. & Edu. Dept. of Info. & Comm. Chap. 3 Logic Gates/Boolean Algebra 3-4 Evaluation rule for Boolean expression 1) Perform all inversions of single terms 2) Perform all operations within parentheses 3) Perform an AND operation before an OR operation 4) If an expression has a bar over it, perform the expression first and then invert the result Determining output level from a diagram l The output can be determined directly from the circuit diagram without using Boolean expression. n 3-8 Implementing circuits from Boolean expression Circuit can be implemented from expression Fig Determining the output from a diagram Fig Constructing a logic circuit from a Boolean expression
Digital Systems © Korea Univ. of Tech. & Edu. Dept. of Info. & Comm. Chap. 3 Logic Gates/Boolean Algebra 3-5 n 3-9 NOR gates and NAND gates NOR gate : Exam. 3-8, 3-9 NAND gate : Exam. 3-10, 3-11, 3-12 n 3-10 Boolean Theorems Single variable theorems( Fig ) l x 0 = 0, x 1 = x, x x = x, x x = 0 l x + 0 = x, x + 1 = 1, x + x = x, x + x = 1 Multivariable theorems l x + y = y + x, x.y = y.x l x + (y + z) = (x + y)+ z = x + y + z, x (yz) = (xy)z = xyz, l x (y + z) = xy + xz, (w + x)(y + z) = wy + xy + wz + xz l x + xy = x : P.81 case 1,2,3,4 or x + xy = x(1+y) = x1= x l x + x y= x = y : (x + x)(x + y) = 1 (x + y) = x + y Exam. 3-13, 3-14, 3-15 Commutative laws Associative laws Distributive laws Fig NOR GateFig NAND Gate
Digital Systems © Korea Univ. of Tech. & Edu. Dept. of Info. & Comm. Chap. 3 Logic Gates/Boolean Algebra 3-6 n 3-11 DeMorgans Theorems DeMorgans Theorems l Exam. Fig. 3-26, 27 Equivalent circuits implied by DeMorgans Theorems Exam. Exam Exam. Exam : Determine the output expression and simplify it using DeMorgan Theorems
Digital Systems © Korea Univ. of Tech. & Edu. Dept. of Info. & Comm. Chap. 3 Logic Gates/Boolean Algebra 3-7 n 3-12 Universality of NAND and NOR gates Implement any logic expression using only NAND or NOR gates Exam : A conveyer belt will shut down whenever specific conditions occur(x = AB + CD) 74LS00 NAND, 74LS08 AND, 74LS32 OR gate ( Fig ) Fig. 3-29, 30 NAND/NOR gates can be used to implement any Boolean operation Fig Possible implementation
Digital Systems © Korea Univ. of Tech. & Edu. Dept. of Info. & Comm. Chap. 3 Logic Gates/Boolean Algebra 3-8 n 3-13 Alternate Logic-Gate Representations Standard Logic Symbols : AND, OR, Inverter, NAND, NOR Alternate Logic Symbols : Fig ) Add bubbles on input and output lines that do not have bubbles, and Remove bubbles that are already there 2) Change the operation symbol from AND to OR, or from OR to AND(Inverter is not changed) l Note: »The equivalence can be extended to gates with any number of inputs »None of the standard symbols have bubbles on their inputs, but all the alternate symbols have bubbles on their inputs »The standard and alternate symbols for each gate represent the same physical circuit(No differences) »NAND and NOR gates are inverting gates(both the standard and the alternate symbols have a bubble on either the input or the output) »AND and OR gates are non-inverting gates(the alternate symbols have bubbles on both inputs and outputs) Fig Standard and alternate symbols
Digital Systems © Korea Univ. of Tech. & Edu. Dept. of Info. & Comm. Chap. 3 Logic Gates/Boolean Algebra 3-9 Logic Symbol Interpretation l Active-HIGH : An input or output line has no bubbles l Active-LOW : An input or output line does have bubbles Exam : Give the interpretation of the two OR gate symbols n 3-14 Which Gate Representation to Use Proper use of the alternate gate can make the circuit operation much clear Fig Interpretation of the two NAND gates Fig Interpretation of the two OR gates Active-LOWActive-HIGHActive-LOW Active-HIGH Output goes LOW only when all inputs are HIGH Output goes HIGH only when any inputs are LOW Output goes HIGH only when any inputs are HIGH Output goes LOW only when all inputs are LOW Active-HIGH Output goes HIGH whenever either A=B=1 or C=D=1 Output goes LOW only when A or B=0 and C or D=0 Active-LOW Fig Alternate Representation Original Circuit
Digital Systems © Korea Univ. of Tech. & Edu. Dept. of Info. & Comm. Chap. 3 Logic Gates/Boolean Algebra 3-10 Which Circuit Diagram Should be Used? l The answer to this question depends on the particular function being performed by the circuit output »If the circuit is used to turn on/off an LED, Relay, or Motor n Active-HIGH : On when output goes to 1 n Active-LOW : On when output goes to 0 Bubble Placement l Whenever possible, choose gate symbols »Bubble outputs connected to bubble inputs( Fig (b) ) »Non-bubble outputs connected to non-bubble inputs( Fig (c) ) Exam. 3-20, 21, 22, 23 Asserted Levels l Asserted = Active l Unasserted = Inactive Labeling Active-LOW Logic Signals l Over-bar = Active Low Signal Labeling Bi-state Signals l Output signals have two active states Address Decode
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