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Digital Logic & Design Dr. Waseem Ikram Lecture 06.

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Presentation on theme: "Digital Logic & Design Dr. Waseem Ikram Lecture 06."— Presentation transcript:

1 Digital Logic & Design Dr. Waseem Ikram Lecture 06

2 Recap Logic Gates Basic Building Blocks Symbol Performs unique function Represented by a function/truth table Function expression Timing Diagram

3 Recap AND Gate F=A.B OR GateF=A+B NOT Gate AND Gate enables/disables device OR Gate car door alarm system NOT Gate 1s complement

4 Recap Alternate Symbolic representations NAND Gate NOT-AND operation Universal NAND Gate NOR Gate NOT-OR operation Universal NOR Gate

5 NOR Universal Gate InputOutput ABF

6 NOR Universal Gate InputOutput ABF

7 NAND-NOR Universal Gate

8 NAND Gate Applications Device Failure Alarm

9 NOR Gate Applications Washing Machine Controller

10 XOR Gate 1 output 2 inputs Multiple inputs

11 XOR Gate function InputOutput ABF

12 XOR Gate Timing Diagram

13 XNOR Gate 1 output 2 inputs Multiple inputs

14 XNOR Gate function InputOutput ABF

15 XNOR Gate Timing Diagram

16 XOR Gate Applications Detecting odd number of 1s

17 XNOR Gate Applications Detecting even number of 1s

18 TTL/CMOS NOT Gate +V CC +V V o/p V i/p +V DD V i/p V o/p NPN Transistor N-Type MOSFET P-Type MOSFET

19 Type of IC Logic Gates 74XX00Quad 2-input NAND Gate 74XX02Quad 2-input NOR Gate 74XX04Hex Inverter 74XX08Quad 2-input AND Gate 74XX10Triple 3-input NAND Gate 74XX11Triple 3-input AND Gate 74XX20Dual 4-input NAND Gate

20 Type of IC Logic Gates 74XX21Dual 2-input AND Gate 74XX27Triple 3-input NOR Gate 74XX30Single 8-input NAND Gate 74XX32Quad 2-input OR Gate 74XX86Quad 2-input XOR Gate 74XX133Single 13-input NAND Gate

21 Logic Gate Integrated Circuits

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23 Integrated Circuits (IC) CMOS Complementary Metal Oxide Logic TTL Transistor-Transistor Logic ECL Emitter Coupled Logic PMOS p-channel MOS transistor NMOS n-channel MOS transistor E 2 CMOS

24 Operational Characteristics DC Supply Voltage Noise Margin Power Dissipation Frequency Response Fan Out


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