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Unit 13 Analysis of Clocked Sequential Circuits Ku-Yaw Chang Assistant Professor, Department of Computer Science and Information.

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Presentation on theme: "Unit 13 Analysis of Clocked Sequential Circuits Ku-Yaw Chang Assistant Professor, Department of Computer Science and Information."— Presentation transcript:

1 Unit 13 Analysis of Clocked Sequential Circuits Ku-Yaw Chang Assistant Professor, Department of Computer Science and Information Engineering Da-Yeh University

2 22004/05/24Analysis of Clocked Sequential Circuits Outline 13.1A Sequential Parity Checker 13.2Analysis by Signal Tracing and Timing Charts 13.3 State Tables and Graphs 13.4 General Models for Sequential Circuits

3 32004/05/24Analysis of Clocked Sequential Circuits State Tables

4 42004/05/24Analysis of Clocked Sequential Circuits State Graph

5 52004/05/24Analysis of Clocked Sequential Circuits Construct the State Table 1.Determine the flip-flop input equations and the output equations from the circuit. 2.Derive the next-state equation for each flip-flop from its input equations, using one of the following relations: D flip-flop Q + = D T flip-flop Q + = T Q : 3.Plot a next-state map for each flip-flop. 4.Combine these maps to form the state table. A transition table A transition table

6 62004/05/24Analysis of Clocked Sequential Circuits First Example

7 72004/05/24Analysis of Clocked Sequential Circuits Construct the State Table 1.Determine the flip-flop input equations and the output equations from the circuit. 2.Derive the next-state equation for each flip-flop from its input equations, using one of the following relations: D flip-flop Q + = D T flip-flop Q + = T Q : 3.Plot a next-state map for each flip-flop. 4.Combine these maps to form the state table. A transition table A transition table

8 82004/05/24Analysis of Clocked Sequential Circuits Construct the State Table Determine the flip-flop input equations and the output equations from the circuit. D A = X B D A = X B D B = X + A D B = X + A Z = A B Z = A B

9 92004/05/24Analysis of Clocked Sequential Circuits Construct the State Table 1.Determine the flip-flop input equations and the output equations from the circuit. 2.Derive the next-state equation for each flip-flop from its input equations, using one of the following relations: D flip-flop Q + = D T flip-flop Q + = T Q : 3.Plot a next-state map for each flip-flop. 4.Combine these maps to form the state table. A transition table A transition table

10 102004/05/24Analysis of Clocked Sequential Circuits Construct the State Table 2.Derive the next-state equation for each flip-flop from its input equations, using one of the following relations: D flip-flop Q + = D D-CE flip-flop Q + = D · CE + Q · CE T flip-flop Q + = T Q S-R flip-flop Q + = S + RQ J-K flip-flop Q + = JQ + KQ A + = X B A + = X B B + = X + A B + = X + A

11 112004/05/24Analysis of Clocked Sequential Circuits Construct the State Table 1.Determine the flip-flop input equations and the output equations from the circuit. 2.Derive the next-state equation for each flip-flop from its input equations, using one of the following relations: D flip-flop Q + = D T flip-flop Q + = T Q : 3.Plot a next-state map for each flip-flop. 4.Combine these maps to form the state table. A transition table A transition table

12 122004/05/24Analysis of Clocked Sequential Circuits Construct the State Table 3.Plot a next-state map for each flip-flop. A + = X B B + = X + A

13 132004/05/24Analysis of Clocked Sequential Circuits Construct the State Table 1.Determine the flip-flop input equations and the output equations from the circuit. 2.Derive the next-state equation for each flip-flop from its input equations, using one of the following relations: D flip-flop Q + = D T flip-flop Q + = T Q : 3.Plot a next-state map for each flip-flop. 4.Combine these maps to form the state table. A transition table A transition table

14 142004/05/24Analysis of Clocked Sequential Circuits Construct the State Table 4.Combine these maps to form the state table. A transition table A transition table

15 152004/05/24Analysis of Clocked Sequential Circuits Moore State Graph

16 162004/05/24Analysis of Clocked Sequential Circuits Second Example

17 172004/05/24Analysis of Clocked Sequential Circuits Construct the State Table Determine the flip-flop input equations and the output equations from the circuit. J A = XB, K A = X J A = XB, K A = X J B = X, K B = XA J B = X, K B = XA Z = XB+XA+XAB Z = XB+XA+XAB

18 182004/05/24Analysis of Clocked Sequential Circuits Construct the State Table 2.Derive the next-state equation for each flip-flop from its input equations, using one of the following relations: D flip-flop Q + = D D-CE flip-flop Q + = D · CE + Q · CE T flip-flop Q + = T Q S-R flip-flop Q + = S + RQ J-K flip-flop Q + = JQ + KQ A + = J A A + K A A = XBA + XA A + = J A A + K A A = XBA + XA B + = J B B + K B B = XB + (AX)B = XB+ XB + AB B + = J B B + K B B = XB + (AX)B = XB+ XB + AB Z = XAB + XB + XA Z = XAB + XB + XA

19 192004/05/24Analysis of Clocked Sequential Circuits Construct the State Table 3.Plot a next-state and output map.

20 202004/05/24Analysis of Clocked Sequential Circuits Construct the State Table 4.Combine these maps to form the state table.

21 212004/05/24Analysis of Clocked Sequential Circuits Mealy State Graph

22 222004/05/24Analysis of Clocked Sequential Circuits Third Example Serial Adder xixixixi yiyiyiyi cicicici c i+1 sisisisi

23 232004/05/24Analysis of Clocked Sequential Circuits Timing Diagram

24 242004/05/24Analysis of Clocked Sequential Circuits Serial Adder Initially the carry flip-flop must be cleared C 0 =0 C 0 =0 Start by adding the least-significant (rightmost) bits in each word. Reading the sum output just before the rising edge of the clock

25 252004/05/24Analysis of Clocked Sequential Circuits State Graph A Mealy machine Inputs: x i and y i Inputs: x i and y i Output: s i Output: s i Two states represent a carry (c i ) S 0 for 0 and S 1 for 1

26 262004/05/24Analysis of Clocked Sequential Circuits Multiple Inputs and Outputs

27 272004/05/24Analysis of Clocked Sequential Circuits Multiple Inputs and Outputs


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