Presentation is loading. Please wait.

Presentation is loading. Please wait.

Ultra Thin HDI Multi-purpose Test Vehicle Idea Stage Project C.B. Katzko, TTM Technologies HDPUG Member Meeting, 2013 September 25 Bennington, Vermont,

Similar presentations


Presentation on theme: "Ultra Thin HDI Multi-purpose Test Vehicle Idea Stage Project C.B. Katzko, TTM Technologies HDPUG Member Meeting, 2013 September 25 Bennington, Vermont,"— Presentation transcript:

1 Ultra Thin HDI Multi-purpose Test Vehicle Idea Stage Project C.B. Katzko, TTM Technologies HDPUG Member Meeting, 2013 September 25 Bennington, Vermont, USA © High Density Packaging Users Group, Inc.

2 Project Background The Post PC Era is upon us PC sales peaked Q1 2011, declined 4.9% YoY Q4-2011/Q Tablets outsold notebooks in USA, China in 2012 Rapid adoption of consumer cloud computing OEMs/ODMs shifting R+D focus from desktop to mobile/wearable © High Density Packaging Users Group, Inc. Worldwide Shipments by Segment (Thousands) PC (DT & NB) 341,263315,229302,315271,612 Ultra Book 9,82223,59238,68796,350 Tablet 116,113197,202265,731467,951 Mobile Phone 1,746,1761,875,7741,949,7222,128,871 Total 2,213,3732,411,7962,556,4552,964,783 Source : Gartner, April 2013 Source : Gartner, May %

3 Project Background Handheld/wearable electronic packaging: Design envelope dominated by batteries & displays Miniaturized & modularized PCBA design with high flex content Extensive use of SoC design, with SiP, PoP & WCSP packaging Low profile CSP, WCSP & microQFN devices, 0.40~0.30mm pitch Ultra-thin 8-14 Layer HDI PCB design, current and near term: Via in Pad/stacked via ICT with decreasing pad diameter Conductor line/space design rules approaching 40/60 2 track routing in 0.40umm pitch devices up to 36x36 BGA 25~40um dielectrics 250~800um thickness Flex & coreless HDI © High Density Packaging Users Group, Inc. How does the performance & reliability stack- up?

4 Examples © High Density Packaging Users Group, Inc. Source : IFIXIT

5 Problem Statement Methods & test vehicles lag design by a decade Do not capture interconnect density or thinness Miss potential failure mechanisms (e.g., ion migration) Low density patterns introduce artifacts not seen in production (e.g., distortion of via stack) Test parameters may exceed practical limits of design or are inappropriate to application (e.g., 50V CAF) Increasingly abandoned by OEMs in favor of non-standardized end product test vehicles Widen the gap between up-stream development & down-stream practice Must be solved by component, PCB & material supply-chain actors, OEMs are working in a black box © High Density Packaging Users Group, Inc.

6 Project Proposal Design, test & standardize an open-source rigid HDI test vehicle for qualification of components, PCBs & PCBA Scaled to smartphone form factors Modularized for various mixes of bare board & assembly testing 0.40, 0.35, 0.30 & 0.25mm pitch BGA devices passive devices 40/60um nominal line/space design rules All Layer Via interconnect with stacked vias, Via in Pad 12 layer build-up with options for HF FR4 & coreless materials with 25~40um thick dielectrics (e.g., 1027, 1037, PI film, RCC) SMT or fine pitch test connectors Standardized array modules & fixtures for assembly & test Deliverables: TV Design, test build & test report Duration : months (depending on duration of tests) © High Density Packaging Users Group, Inc.

7 Project Work Flow Data Analysis & Failure Analysis Data Analysis & Failure Analysis PCBA Assembly & ICT PCB Fabrication & SOT PCB Fabrication & SOT PCB TV PoC Build & Test ( reflow, MSA ) PCB TV PoC Build & Test ( reflow, MSA ) PCB TV Redesign ( if required) PCB TV Redesign ( if required) PCBA Assembly Tooling Design & Preparation PCB Materials Components & Assembly Materials Components & Assembly Materials Short Term Tests Long Term Tests Test Report Paper & Poster Short Term Tests Long Term Tests End Start PCB TV Design & Tooling PCB TV Design & Tooling Idea Stage Implementation Stage

8 Project Task List PCB TV at CAD Sept.23 PCB TV at CAD Sept.23

9 Participants EngentFei Xie KyzenMike Bixenmann PanasonicTony Senese TTMTommy Huang Zaron Huang Angela Lee Summer Xiao C.B. KatzkoProject Leader HDPUGRuben Bergman Robert SmithProject Facilitator

10 Test Vehicle Design Progress

11 12 Layer Build-up Typical logic board design is layers 12 layers is best match to electrical & IST coupons 1037 construction for proof of concept builds LayerMaterial Type Target Thickness um DescriptionCu Density Build-up Layers 19um Cu Foil + Cu Plating25SMD Assembly- 1x1067, 1037 or Prepreg Dielectric 29um Cu Foil + Cu Plating18Plane75% 1x1067, 1037 or Prepreg Dielectric 39um Cu Foil + Cu Plating18Signal50% 1x1067, 1037 or Prepreg Dielectric 49um Cu Foil + Cu Plating18Plane75% 1x1067, 1037 or Prepreg Dielectric 59um Cu Foil + Cu Plating18Signal50% 1x1067, 1037 or Prepreg Dielectric Core 69um Cu Foil + Cu Plating18Plane75% 0.60mm 1x1067 or Core Dielectric 79um Cu Foil + Cu Plating18Plane75% Build-up Layers 1x1067, 1037 or Prepreg Dielectric 89um Cu Foil + Cu Plating18Signal50% 1x1067, 1037 or Prepreg Dielectric 99um Cu Foil + Cu Plating18Plane75% 1x1067, 1037 or Prepreg Dielectric 109um Cu Foil + Cu Plating18Signal50% 1x1067, 1037 or Prepreg Dielectric 119um Cu Foil + Cu Plating18Plane75% 1x1067, 1037 or Prepreg Dielectric 129um Cu Foil + Cu Plating25SMD Assembly Total Thickness NB - Prepreg resin content % requires adjustment based on copper pattern density Confirmed for Design high density & thickness yield low density & thickness yield

12 Panel Layout 2 set designs, PCB test & PCBA test, 2+2 sets per panel Sets step diagonally opposite, inside & outside PCBA Test sets can be divided into sub-sets for assembly Confirmed for Design Set B1 PCBA Set A PCB Set B2 PCBA Set A2 PCB 500mm Y-axis (warp) 400mm X – axis (fill) PCB process direction

13 Set Design kerf 2.0 typical Confirmed for Design PCB process direction Multiple modules combined for large coupons

14 50x50mm Module connector & break-away coupon zone 6mm x 38mm 1~4 sides as required populated zone 38mm x 38mm Ø 2mm NPTH for fixture or hanging Connectors : 2.54mm pitch Wire : 26 AWG or 28 AWG Pins : Typically 0.50mm square PTH : Ø1.05mm (1.2mm drill) 3mm support tab of fixture Confirmed for Design

15 PCB Floor Plan X – axis (fill) Y-axis (warp) PCB process direction Under Redesign Confirmed for Design

16 PCBA Floor Plan PCB process direction Preliminary Proposal X – axis (fill) Y-axis (warp) Drop Test Holes One Pitch Each Side Pending, need OEM inputs EL coupons include lines with vias to characterize interconnects Due to ultra- thin dielectric layers, electrical performance is critical

17 Want Ad Human Resources – Practitioners or Developers Device ODMs PCB designers (OEMs or fabricators) PCB & assembly materials suppliers Assembler with 0.30mm pitch P+P capability Captive or Independent test labs Material Resources Daisy-chain devices (donated or purchased) PCB materials (donated) PCB fabrication & assembly services Test services Timeline Design 3-4 months PoC Lot Fabrication & Test 1 month PCB Fab, Assembly & Test 6-9 months © High Density Packaging Users Group, Inc. Join Now!

18 Thank You Q&A © High Density Packaging Users Group, Inc.


Download ppt "Ultra Thin HDI Multi-purpose Test Vehicle Idea Stage Project C.B. Katzko, TTM Technologies HDPUG Member Meeting, 2013 September 25 Bennington, Vermont,"

Similar presentations


Ads by Google