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Industrial Testing Education at Undergraduate Level: A Datasheet and Diagnosis Labs Approach EWME2010 Béatrice Pradarelli / Laurent Latorre / Pascal Nouet.

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Presentation on theme: "Industrial Testing Education at Undergraduate Level: A Datasheet and Diagnosis Labs Approach EWME2010 Béatrice Pradarelli / Laurent Latorre / Pascal Nouet."— Presentation transcript:

1 Industrial Testing Education at Undergraduate Level: A Datasheet and Diagnosis Labs Approach EWME2010 Béatrice Pradarelli / Laurent Latorre / Pascal Nouet

2 Outline Introduction to CNFM/CRTC Labs oriented approach for industrial testing education of undergraduate students Future Developments

3 CNFM National Comity for Education in Nano and Microelectronics EWME2010

4 Micro/Nano-electronic industry CNFM centers RENATER Network CNFM Network Created 25 years ago to answer to the need of sharing high cost equipments (tester, cleaning room, …) for education Sponsored by French government & micro/nano electronic industry 12 CNFM centers strategically located

5 CNFM Missions To share equipments dedicated to IC manufacturing and characterization, prototyping, test of IC and SIP/SOC products and design automation tools To offer dedicated trainings to academic people (students and teachers) To develop collaborations with research labs and companies to promote innovation

6 CRTC: CNFM Test Resource Center Public organization, created in 1998, specialized in the test of microelectronic products. Located in Montpellier, south of FRANCE. Owner of an industrial tester, the Verigy V93K PinScale: Used for Education at undergraduate and L, M, D levels. Used for test engineering services (test time, support, consulting) to companies & research labs Accessible from anywhere

7 INDUSTRIAL TESTING EDUCATION AT UNDERGRADUATE LEVEL EWME2010

8 ICs testing in Mass production Millions of parts (ICs) tested automatically daily Rooms full of test equipments (tester/handler/prober) Skilled technicians in charge of the overall process

9 CRTC Environment and Network DEVICE UNDER TEST Optical Link

10 Lab Oriented Approach Pedagogical Objectives Initiate undergraduate students to industrial testing Guide them having a better understanding of the interaction between ICs design, manufacturing & test Data Sheet Test Prog. Test Results PF Analysis Diagnosis Device robustness versus design and manufacturing

11 From Data Sheet to Test Program Test Program Data Sheet Block diagram Pinning Operating conditions Truth table DC characteristics AC characteristics Test Program Test conditions: T (°C), Vcc Functional test Parametric tests: Vil/Vih/Vol/Voh and leakage measurements Timing tests: propagation delay, set up and hold times measurements Continuity Test Fonctional Test AC Test START DC Test

12 Test Results Analysis Manufacturing, assembly verification Industrial test concept Protection diodes on each pad ESD damages / wrist strap usage Continuity Test Functional Test AC Test START DC Test

13 Test Results Analysis Device behavior verification Go/no Go test Test flow execution order, test strategy, cost of test Continuity Test Functional Test AC Test START DC Test Pass (Go) Fail (No Go) Fonctional Test @ f1 Fonctional Test @ f2<f1 $ $$$

14 Test Results Analysis Electrical and timing parameters verification Measured values vs data sheet ones Product characterization: shmoo plots Product robustness versus process Continuity Test Functional Test AC Test START DC Test margin LLUL

15 Failing Device FPGA approach to insert stuck at/delay faults SWITCHES MODE DELAY Good IC Schematic + new lines

16 Diagnosis Understanding the failures and finding the root cause in the IC using the tester debugger tools Interaction between Test, Design, Design for Testability (DFT) and process Sa1 S1

17 Summary CRTC test activities and organization offer test services and trainings to academic, research lab and industrial people. Lab oriented approach to initiate undergraduate students to industrial testing in 8 hours deployed since 2008: 50 students attended. Next: develop a new lab using the FPGA platform and addressing the DFT, fault simulations, SCAN test concepts EWME2010


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