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**An Introduction to Matching and Layout Alan Hastings Texas Instruments**

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Overview of Matching Two devices with the same physical layout never have quite the same electrical properties. Variations between devices are called mismatches. Mismatches may have large impacts on certain circuit parameters, for example common mode rejection ratio (CMRR). By default, simulators such as SPICE do not model mismatches. The designer must deliberately insert mismatches to see their effects.

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Kinds of Mismatch Mismatches may be either random or systematic, or a combination of both. Suppose two matched devices have parameters P1 and P2. Then let the mismatch between the devices equal P = P2 – P1. For a sample of units, measure P . Compute sample mean m(P ) and standard deviation s(P ). m(P ) is a measure of systematic mismatch. s(P) is a measure of random mismatch.

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Random Mismatches Random mismatches are usually due to process variation. These process variations are usually manifestations of statistical variation, for example in scattering of dopant atoms or defect sites. Random mismatches cannot be eliminated, but they can be reduced by increasing device dimensions. In a rectangular device with active dimensions W by L, an areal mismatch can be modeled as:

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**Random Mismatches (continued)**

Random mismatches thus scales as the inverse square root of active device area. To reduce mismatch by a factor of two, increase area by a factor of four. Precision matching requires large devices. Other performance criteria (such as speed) may conflict with matching.

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**Systematic Mismatches**

Systematic mismatches may arise from imperfect balancing in a circuit. Example: A mismatch VCE between the two bipolar transistors of a differential pair generates an input offset voltage VBE equal to: Simulations will readily show this source of systematic offset. Usually, the circuit can be redesigned to minimize or even to completely eliminate this type of systematic offset.

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**Gradients Systematic mismatches may also arise from gradients.**

Certain physical parameters may vary gradually across an integrated circuit, for example: Temperature Pressure Oxide thickness These types of variations are usually treated as 2D fields, the gradients of which can (at least theoretically) be computed or measured. Because of the way we mathematically treat these variations, they are called gradients.

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**Gradients (continued)**

Even subtle gradients can produce large effects. A 1C change in temperature produces a –2mV in VBE, which equates to an 8% variation in IC. Power devices on-board an integrated circuit can easily produce temperature differences of 10–20C.

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**Analyzing Gradients For a simplified analysis of gradients:**

Make the following assumptions of linearity: The gradient is constant over the area of interest. Electrical parameters depend linearly upon physical parameters. Although neither assumption is strictly true, they are usually approximately true, at least for properly laid out devices.

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**Analyzing Gradients (continued)**

Assuming linearity, We can reduce each distributed device to a lumped device located at the centroid of the device area. The magnitude of the mismatch equals the product of the distance between the centroids and the magnitude of the gradient along the axis of separation. Therefore we can reduce the impact of the mismatch by reducing the separation of the centroids.

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**How to Find a Centroid (Easily)**

Rules for finding a centroid (assuming linearity): If a geometric figure has an axis of symmetry, then the centroid lies on it. If a geometric figure has two or more axes of symmetry, then the centroid must lie at their intersection.

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**The Centroid of an Array**

The centroid of an array can be computed from the centroids of its segments. If all of the segments of the array are of equal size, then the location of the centroid of the array is the average of the centroids of the segments: Note that the centroid of an array does not have to fall within the active area of any of its segments. This suggests that two properly constructed arrays could have the same centroid….

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**Common-centroid Arrays**

Arrays whose centroids coincide are called common-centroid arrays. Theoretically, a common-centroid array should entirely cancel systematic mismatches due to gradients. In practice, this doesn’t happen because the assumptions of linearity are only approximately true. Common-centroids don’t help random mismatches at all. Neither are they a cure for sloppy circuit design! Virtually all precisely matched components in integrated circuits use common centroids.

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Interdigitation The simplest sort of common-centroid array consists of a series of devices arrayed in one dimension. One-dimensional common-centroid arrays are ideal for long, thin devices, such as resistors. Since the segments of the matched devices are slipped between one another to form the array, the process is often called interdigitation.

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**Interdigitation (continued)**

Not all interdigitated arrays are made equal! Certain arrays precisely align the centroids of the matched devices (A, C). These provide superior matching. Other arrays only approximately align the centroids (B). These provide inferior matching.

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**2D Cross-coupled Arrays**

A more elaborate sort of common-centroid array involves devices cross-coupled in a rectangular two-dimensional array. This type of array is ideal for roughly square devices, such as capacitors and bipolars.

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**2D Cross-coupled Arrays (cont’d)**

The simplest two-dimensional cross-coupled array contains four segments. This type of array is called a cross-coupled pair. For many devices, particularly smaller ones, the cross-coupled pair provides the best possible layout. More complicated 2D arrays containing more segments provide better matching for large devices because they minimize the impact of nonlinearities.

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**Practical Common-centroid Arrays**

Often, the design of a common-centroid array is complicated by layout considerations. Sometimes certain devices can be merged, resulting in a smaller overall array. Unfortunately, such mergers often constrain the layout of the array. The proper design of a cross-coupled array is often quite difficult, and a certain degree of experience is required to obtain good results.

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2:1:2 Bipolar Array This array matches a 4X and a 1X bipolar transistor using interdigitation.

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4:1:4 Bipolar Array This array matches an 8X and a 1X bipolar transistor using interdigitation.

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**Rules for Common Centroids**

The following rules summarize good design practices: Coincidence: The centroids of the matched devices should coincide, at least approximately. Ideally, the centroids should exactly coincide. Symmetry: The array should be symmetric about both the X- and the Y-axes. Ideally, this symmetry should arise from the placement of the segments in the array, and not from the symmetry of the individual segments. Dispersion: The array should exhibit the highest possible degree of dispersion; in other words, the segments of each device should be distributed throughout the array as uniformly as possible. Compactness: The array should be as compact as possible. Ideally, it should be nearly square.

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