3 References T. M. Pinkston and J. Duato: Interconnection Networks, Appendix E in Computer Architecture: A Quantitative Approach, 4 th Edition, Morgan Kaufmann publishers (2006). 5 th Edition, Morgan Kaufmann publishers (2011). J. Duato, S. Yalamanchili, L. Ni: Interconnection Networks- an Engineering Approach-, 2, Morgan Kaufmann publishers (2003) 1996 W.D. Dally, B. Towles: Principles and Practices of Interconnection Networks, Morgan Kaufmann publishers (2003)
4 What is an interconnection Network? It is a programmable system that transports data between terminals, such as processors and memory. It is programmable in the sense that it makes different connections at different points. It is a system because it is composed of many components: buffers, channels, switches, and controls that works together to deliver data.
5 Interconnection Network (1/2) P M Interconnection Network Multicomputer P M P M
6 Interconnection Network (2/2) P M Interconnection Network UMA type shared memory multiprocessor It is also called dance-hall architecture. P M P M
7 Trend Its performance is increasing with processor performance at a rate of 50% per year. Communication is a limiting factor in the performance of many modern systems. Buses have been unable to keep up with the bandwidth demand, and point-to-point interconnection networks are rapidly taking over.
11 Other Networks of Supercomputers Sequoia (2011): 5D torus, proprietary IBM SeaStar Pleiades / NASA (2011): partial 11D hypercube topology with IB QDR/DDR Red Sky/ Sandia National Lab. (2010): 3D torus (12 bristled node) with IB QDRswitches IBM Roadrunner (2009): fat-tree with IB DDR Earth Simulator2 / NEC SX-9E (2009): Fat-Tree (64GB/s/cpu, 8-CPU/node, 160 nodes) IBM Blue Gene/L (2004): 3D torus proprietary (64 x 32 x 32 = 64K nodes)
12 Architecture vs. software memoryprogramming UMA (SMP)sharedOpenMP NUMA (MPP) distributed (not shared) MPI (Message Passing Interface)
13 Network Design (1/3) Performance: latency and throughput (bandwidth) Scalability: #processors vs. network, memory, I/O bandwidth Incremental expandability: small to maximum size Partitionability: netwrok may be partitioned for several users
14 Network Design (2/3) Simplicity: simple design, higher clock frequency, easy to use Distance span: smaller system is preferred for noise and cable delay, etc. Physical constraints: packaging (pin count), wiring(wire length), and maintenance (power consumption) should meet physical limitation.
15 Network Design (3/3) Reliability: fault tolerant, reliable communication, hot swap Expected workload: robust performance over a wade range of traffic conditions. Cost: trade-offs between cost and performance.
16 Classifiction of Interconnection Networks Shared-Medium Networks –Local area networks (ethernet, token ring) –Backplane bus (e.g. SUN Gigaplane) Direct Networks (router-based) –mesh, torus, hypercube, tree, … etc. Indirect Networks (switch-based) Hybrid Networks
17 Shared-Medium Networks (LAN) Arbitration that determines the mastership of the shared-medium network to resolve network access is needed. The most well-known protocol is carrier-sense multiple access with collision detection (CSMA/CD). Token bus and token ring pass a token from the owner which has the right to access the bus/ring and resolve nondeterministic waiting time.
18 Shared-Medium Networks (Backplane bus) It is commonly used to interconnect processor(s) and memory modules to provide SMP (Symmetrical Memory Processor) architecture. It is realized by printed lines on a circuit board by discrete wiring. Gigaplane in SUN Enterprise x000 server(1996): 2.6GB/s, 256 bits data, 42 bits address, 83.8MHz clock.
19 Direct (static) Networks Consists of a set of nodes. Each node is directly connected to a subset of other nodes in the network. Examples: –2D mesh (intel Paragon), 3D mesh (MIT J-Mahine) –2D torus (Fujitsu AP3000), 3D torus (Cray T3D, T3E) –Hypercube (CM1, CM2, nCUBE)