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1 Circuitos Digitales II y Lab. Circuitos Digitales II y Lab. Arquitectura de Punto Flotante Semana No.14 Semestre 2011-2 Prof. Eugenio Duque Pérez eaduque@udea.edu.co Prof. Gustavo Patiño Álvarez (en comisión) gpatino@udea.edu.co Departamento de Ingeniería Electrónica Facultad de Ingeniería

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Align the decimal point of the number that has the smaller exponent. Add the decimal numbers. The exponent is common. The result must be normalized. Scientific notation. Round the result taking in consideration the spaces for decimal digits. The binary floating point addition, has a similar behavior. Show examples. Decimal Floating Point addition 10

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Add of exponents. Multiply the bases. Normalize the result. Round the result taking in account the spaces for decimal digits. Binary floating multiplication has similar behavior but is necessary to correct the double add of bias Example. Decimal and binary Decimal Floating Point multiplication. 11

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Computer Organization and Design. The Hardware /Software Interface. David Patterson and John Hennessy. Pp. 275-300 IEEE 754 Estándar Floating-Point. mth Exercises Parcial_2_09-01.pdf Bibliography 12

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