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Chapter 5 : Memory Management

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Presentation on theme: "Chapter 5 : Memory Management"— Presentation transcript:

1 Chapter 5 : Memory Management
By : Jigar M. Pandya

2 The need for memory management
Memory is cheap today, and getting cheaper But applications are demanding more and more memory, there is never enough! Basically we will do memory management for primary memory By : Jigar M. Pandya

3 Memory Management Memory needs to be allocated to ensure a reasonable supply of ready processes to consume available processor time By : Jigar M. Pandya

4 Memory Management Requirements
Relocation Protection Sharing Logical organisation Physical organisation By : Jigar M. Pandya

5 Requirements: Relocation
The programmer does not know where the program will be placed in memory when it is executed, it may be swapped to disk and return to main memory at a different location (relocated) Memory references must be translated to the actual physical memory address By : Jigar M. Pandya

6 Requirements: Protection
Processes should not be able to reference memory locations in another process without permission Impossible to check absolute addresses at compile time Must be checked at run time By : Jigar M. Pandya

7 Requirements: Sharing
Allow several processes to access the same portion of memory Better to allow each process access to the same copy of the program rather than have their own separate copy By : Jigar M. Pandya

8 Requirements: Logical Organization
Memory is organized linearly (usually) Programs are written in modules Modules can be written and compiled independently Different degrees of protection given to modules (read-only, execute-only) Share modules among processes Segmentation helps here By : Jigar M. Pandya

9 Requirements: Physical Organization
Cannot leave the programmer with the responsibility to manage memory Memory available for a program plus its data may be insufficient Overlaying allows various modules to be assigned the same region of memory but is time consuming to program Programmer does not know how much space will be available By : Jigar M. Pandya

10 The need for Relocation
Because of need for process swapping and memory compaction, a process may occupy different main memory locations during its lifetime. Consequently, physical memory references (addresses) by a process cannot always be fixed. This problem is solved by distinguishing between logical address and physical address. By : Jigar M. Pandya

11 Logical vs. Physical Address Space
The concept of a logical address space that is bound to a separate physical address space is central to proper memory management. Logical address – generated by the CPU; also referred to as virtual address. Physical address – address seen by the memory unit. By : Jigar M. Pandya

12 Swapping A process can be swapped temporarily out of memory to a backing store, and then brought back into memory for continued execution. Backing store – fast disk large enough to accommodate copies of all memory images for all users; must provide direct access to these memory images. Roll out, roll in – swapping variant used for priority-based scheduling algorithms; lower-priority process is swapped out so higher-priority process can be loaded and executed. Major part of swap time is transfer time; total transfer time is directly proportional to the amount of memory swapped. Modified versions of swapping are found on many systems, i.e., UNIX, Linux, and Windows. By : Jigar M. Pandya

13 Schematic View of Swapping
By : Jigar M. Pandya

14 Contiguous Allocation
Main memory usually into two partitions: Resident operating system, usually held in low memory with interrupt vector. User processes then held in high memory. Single-partition allocation Relocation-register scheme used to protect user processes from each other, and from changing operating-system code and data. Relocation register contains value of smallest physical address; limit register contains range of logical addresses – each logical address must be less than the limit register. By : Jigar M. Pandya

15 Dynamic Storage-Allocation Problem
How to satisfy a request of size n from a list of free holes. First-fit: Allocate the first hole that is big enough. Best-fit: Allocate the smallest hole that is big enough; must search entire list, unless ordered by size. Produces the smallest leftover hole. Worst-fit: Allocate the largest hole; must also search entire list. Produces the largest leftover hole. First-fit and best-fit better than worst-fit in terms of speed and storage utilization. By : Jigar M. Pandya

16 Fragmentation External Fragmentation – total memory space exists to satisfy a request, but it is not contiguous. Internal Fragmentation – allocated memory may be slightly larger than requested memory; this size difference is memory internal to a partition, but not being used. Reduce external fragmentation by compaction Shuffle memory contents to place all free memory together in one large block. Compaction is possible only if relocation is dynamic, and is done at execution time. By : Jigar M. Pandya

17 Paging It is memory management scheme .
Every Process is Divided in to number of pages. Divide physical memory into fixed-sized blocks called frames Divide logical memory into blocks of same size called pages. By : Jigar M. Pandya

18 Paging In Continuous Memory management
We have to assign a whole block of the process size in the memory. Some time it may be not available in a single block. In Paging process is divided in to pages so there may be free pages available in the memory of same size. A process can put its page at any frame in The memory . When CPU runs a process it will generate logical addresses. But there should be some mapping between Logical Address and the frame in the Mem. By : Jigar M. Pandya

19 Paging Every Logical address will be divided In to two parts.
1) p = page number 2) d = offset In Example if Page size is 10 then For process of size 5 P= 0 d = 5 For process of size 12 P= 1 d = 2 Offset 2 in page 1 will be same as offset 2 in frame 3 because p1 is loaded in to frame no 3 By : Jigar M. Pandya

20 Paging By : Jigar M. Pandya

21 Paging CPU will generate a Logical address in p & d form.
There Will Be A page map table to map the logical address to the frame number Logical address page number will be index of PMT. Using that we can get frame number. combine that frame number with offset will give you physical address in memory By : Jigar M. Pandya

22 Free Frames Before allocation After allocation By : Jigar M. Pandya

23 Implementation of Page Table
Page table is kept in main memory. Page-table base register (PTBR) points to the page table. Page-table length register (PRLR) indicates size of the page table. In this scheme every data/instruction access requires two memory accesses. One for the page table and one for the data/instruction. The two memory access problem can be solved by the use of a special fast-lookup hardware cache called associative memory or translation look-aside buffers (TLBs) By : Jigar M. Pandya

24 Associative Memory Associative memory – parallel search Page # Frame #
By : Jigar M. Pandya

25 Paging Hardware With TLB (translation look-aside buffers)
By : Jigar M. Pandya

26 Advantage of Paging If I want to user 100 KB then I don’t need a single block of 100KB I can use 10 free frame of 10KB that may not in continuous memory location. So some how we can avoid the problem of fragmentation. By : Jigar M. Pandya

27 Paging When we do paging we are dividing the code in to number of pages. So it may happen if there is a for loop Then some portion may be in first page, remaining may be in second page. That will also run the code . But if we want to separate code in modular format then we can use new concept that is called … SEGMENTATION By : Jigar M. Pandya

28 SEGMENTATION What is Module ??
If a large program is there then we are dividing that in to small small function that functions are called the modules. A program is a collection of segments. A segment is a logical unit such as: main program, procedure, function, method, object, local variables, global variables, common block, By : Jigar M. Pandya

29 User’s View of a Program
By : Jigar M. Pandya

30 User’s View of a Program
In segmentation there won’t be same size frames in memory it will be of different size segment and will be created when ever it is needed. So no fixed partition. By : Jigar M. Pandya

31 Logical View of Segmentation
1 4 2 3 1 2 3 4 user space physical memory space By : Jigar M. Pandya

32 Segmentation Architecture
Logical address consists of a two tuple: <segment-number, offset> Segment table – maps two-dimensional physical addresses; each table entry has: base – contains the starting physical address where the segments reside in memory. limit – specifies the length of the segment. Segment-table base register (STBR) points to the segment table’s location in memory. Segment-table length register (STLR) indicates number of segments used by a program; By : Jigar M. Pandya

33 Segmentation Architecture
Offset can not go beyond the size of the limit register By : Jigar M. Pandya

34 Segmentation Memory Management
By : Jigar M. Pandya

35 Example of Segmentation
By : Jigar M. Pandya

36 Segmentation Vs paging
By : Jigar M. Pandya

37 Segmentation with Paging
First The request will be divided in to segment Then each segment will be divided in to pages. So we need to manage segment table and also the page table for each segment. By : Jigar M. Pandya

38 Segmentation with Paging
By : Jigar M. Pandya

39 Virtual Memory Virtual memory – separation of user logical memory from physical memory. Only part of the program needs to be in memory for execution. Logical address space can therefore be much larger than physical address space. Allows address spaces to be shared by several processes. Allows for more efficient process creation. Virtual memory can be implemented via: Demand paging Demand segmentation By : Jigar M. Pandya

40 Thrashing Thrashing  a process is busy swapping pages in and out.
If a process does not have “enough” pages, the page-fault rate is very high. This leads to: low CPU utilization. operating system thinks that it needs to increase the degree of multiprogramming. another process added to the system. By : Jigar M. Pandya

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