Download presentation

Presentation is loading. Please wait.

Published byHeriberto Birckhead Modified over 3 years ago

1
Tiling Examples for X86 ISA Slides Selected from Radu Ruginas CS412/413 Lecture on Instruction Selection at Cornell

2
Instruction Selection Translate 3-address code to DAG Cover DAG with tiles – Disjoint set of tiles cover DAG – Algorithm: Greedy maximal munch Dynamic programming

3
Tiling Assume abstract assembly – Infinite registers – Temporary and/or local variables stored in registers – Array, struct, parameter passing use memory accesses Translation process from IR: – Convert 3-address code IR to abstract assembly – Build DAG – Perform tiling

4
Example a = a + i where a is a local variable and i is a parameter passed in from a caller

5
Pentium ISA Two-address CISC Multiple addressing modes – Immediate: $imm – Register: reg – Indirect: (reg), (reg + imm) – Indexed: (reg + reg), (reg + imm*reg)

6
More Tile Examples

7
Conditional Branches

8
Load Effective Address

9
Maximal Munch Algorithm A greedy algorithm Start from top of tree (or DAG) Find largest tile that matches top node Tile the sub-trees recursively

10
Non-Greedy Tiling

11
Greedy Tiling

12
ADD Expression and Statement

13
Designing Tiles Only add tiles that are useful to compiler Many instructions will be too hard to use effectively or will offer no advantage Need tiles for all single-node trees to guarantee that every tree can be tiled

14
Implementation Maximal Munch: start from top node Find largest tile matching top node and all of the children nodes Invoke recursively on all children of tile Generate code for this tile Code for children will have been generated already in recursive calls

15
Matching Tiles

16
Finding globally optimum tiling Goal: find minimum total cost tiling of DAG Algorithm: for every node, find minimum total cost tiling of that node and subgraph below it Lemma: Given minimum cost tiling of all nodes in subgraph, we can find minimum cost tiling of the node by trying out all possible tiles matching the node Therefore: start from leaves, work upward to top node

17
Timing Cost Model Idea: associate cost with each tile (say proportional to number of cycles to execute) – May not be a good metric on modern architectures Total execution time is sum of costs of all tiles

18
Dynamic Progamming Traverse DAG recursively, and for each node n, record, where – t is the best tile to use for subgraph rooted at n, – c is the total cost of tiling the subgraph rooted at n if t is chosen. To compute for node n – Consider every tile t that matches rooted at n, and compute total cost c = cost of tile t + sum of the costs of tiling the subgraphs rooted at the leaves of t (which costs can be computed recursively and memoized) – Store lowest-cost tile t and its total cost c To emit code, traverse least-cost tiles recursively and emit code in postorder

Similar presentations

OK

Instruction Set Architecture Classification According to the type of internal storage in a processor the basic types are Stack Accumulator General Purpose.

Instruction Set Architecture Classification According to the type of internal storage in a processor the basic types are Stack Accumulator General Purpose.

© 2017 SlidePlayer.com Inc.

All rights reserved.

Ads by Google

Ppt on wimax Ppt on milk products for students What to expect at 30 week dr appt on the beach Ppt on soft skills download Ppt on lateral thinking by edward de bono Ppt on earthquake and tsunami Download ppt on sectors of economy Ppt on statistics in maths cheating A ppt on bill gates Ppt on input and output devices of computer download