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CMP 101 Fundamentals of Computer and programming in C Rohit Khokher.

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Presentation on theme: "CMP 101 Fundamentals of Computer and programming in C Rohit Khokher."— Presentation transcript:

1 CMP 101 Fundamentals of Computer and programming in C Rohit Khokher

2 Central Processing Unit Main Memory (RAM) FlashProgrammable Read only Memory (PROM) Read only Memory (ROM) Cache Memory Decoder Program Control Register Instruction Register Memory Address Register Memory Buffer Register Input/output Register General Purpose Register Accumulator Register General Purpose Register I/O D E V I C E s ALU Control Unit

3 Instruction Set Instruction Operation (op) CodeOperand ADDOperand oneOperand two 00011100 AR0 Instruction Accumulator register General Purpose Register 00011100 0000 00100001 00011100 0001 00110001 Before execution After execution

4 Registers RegisterUsage Memory Address Register (MAR) It holds the memory location address. Memory Buffer Register (MBR) I holds the content to be stored (written) or read from the memory. Program Control Register (PC) It holds the address of the next instruction to be executed. Accumulator Register (A)It holds data to be operated upon, intermediate results and processing results. Instruction Register (I)It hold the current instruction which is being executed. Input/output Registers(I/O) It is used to communicate with the input/output devices.

5 PC 0123 + A, R0 0 I+ A, R Control Unit Decoder Decoder Interprets the instruction Decoded instructions Control unit takes the decoded instruction s and sends signals to ALU or other units for execution IMPORTANT: Immediately after the control unit takes the address from PC the PC is set to the address of the next instruction automatically IMPORTANT: Immediately after the control unit takes the address from PC the PC is set to the address of the next instruction automatically Main memory code segment Contents Instruction

6 Processor Speed System clock: It emit millions of pulses per second. The pulses are emitted at regular intervals (clock cycles). The ALU & control unit operations are synchronized by system clock. Instructions are interpreted into actions and each action is executed at properly defined intervals

7 Go to address D Read content of D Write it into register A 1101 0101 00000101 1110 1001 Go to address E Read content of E Write it into register B 00001001 A B ADD contents of registers A and B Write the result into register C 00001110 C 5 9 14 The instruction (+ D, E) may be interpreted as goto, read, write add, write

8 Instruction Cycle One instruction cycle is the time required to perform on instruction. Several instruction cycles are required to fetch, decode and execute an instruction. The shorter the clock cycle the faster the processor

9 Instruction Cycle The clock speed is measured in GHz. Gigahertz, refers to frequencies in the billions of cycles per second range (1,000,000,000 Hz). Intel® Core i7 Processor The best desktop processor family on the planet¹ 3.06 GHz

10 Processor Types CISC : Complex Instruction Set Computer. A set of large number of variable length instructions. RISC: Reduce instruction set computers. EPIC: Explicitly parallel Instruction Computing. 11001100 2020 22 4 Parallel Computation

11 Main Memory Storage Evaluation Criteria Explanation Storage capacityMaximum number of bytes/words. Access timeTime required to locate and retrieved stored data. Cost per bit of storageCost of a memory unit of a desired capacity. Volatile/NonvolatileVolatile memory looses data when power source is turned off or interrupted. Nonvolatile memory retains data when power is turned off or interrupted. Random accessIn random access memory (RAM) every data item can be accessed independently at any instance of time. Main memory, primary memory or simply memory is used by CPU to store/retrieve data and instructions temporarily.

12 Why more bits? Larger numbers and address space Main memory Interfacing device requests to read or write contents Controller AddressesContents 0 1 2 3 4 5 - - - -12…n Address buss: Sends the memory address of the data. Address space: Number of memory byte or words Address space = 2 n where n is the number of bits in address bus. Data buss Bits

13 Fixed and variable length memory Word addressable memory: Where each word is of fixed size 16-bits, 32-bits or 64-bit words. They can store 2, 4 or 8 characters (or bits). Such memory is viewed as fixed length memory. Character (or byte) addressable memory is viewed as variable length memory.

14 RAM, ROM, PROM & EPROM Random Access Memory (RAM) Volatile Read Only Memory (ROM) Nonvolatile, storing data in ROM is called burning in, used for microprogramming and system boot program, user cannot program it. Programmable Read Only Memory (PROM) Nonvolatile but unlike ROM user can write a program only once. Erasable Programmable Read Only Memory (EPROM) Nonvolatile, It is like ROM or PROM but user can erase and write programs repeatedly. There are two types of EPROM: Ultra violet EPROM (Erased using ultraviolet light)and EEPROM (Erased using high voltage. EPROM is also called flash memory.

15 Cache Memory Cache memory is the fast memory like registers. It is used to minimize the memory-processor speed mismatch. It is a buffer between the main memory and the processor.

16 Read about the following Computer Memory Types L1 cache L2 cache RAM - the Main Memory DRAM Fast Page Mode DRAM EDO DRAM SDRAM PC133 SDRAM DDR SDRAM DDR2 SDRAM Dual-channel DDR 1T-SRAM Direct RDRAM SIMMs DIMMs RIMMs Presence detect Parity memory ECC memory Memory upgrades Evolution Flash memory Magnetic RAM

17 The basic rule--which states that the number of transistors on a chip doubles every 24 months--has been the guiding principle of the high-tech industry since it was coined by Intel co-founder Gordon Moore in 1965.

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