1. Introduction to Microprocessor’s & Microcontroller
Prepared by
Md. Zakir Hossain
Lecturer
Dept. of EEE, KUET

2. Contents 8085 Microprocessor Bus, CPU, Memory and I/O of 8085 μp
The 8085 Bus Structure
CPU Internal Structure
Hardware Description of uPC-MICRO 8085
Keys and Key Functions
8086μp internal architecture
Function of Keypad & Register
ATmega8(L) microcontroller

3. Microprocessor
A microprocessor is a multipurpose, programmable, clock-driven, register based electronic device that reads binary instructions from a storage device called memory; accepts binary data as input and processes data according to those instructions, provides results as output.
Fig1. CPU internal structure of 8085 microprocessor

4. The 8085 Bus Structure Address Bus
The internal architecture of the 8085 CPU is capable of performing the following operations:
Store 8-bit data (Registers, Accumulator)
Perform arithmetic and logic operations (ALU)
Test for conditions (IF / THEN)
Sequence the execution of instructions
Store temporary data in RAM during execution
the ALU includes a temporary register used for holding data temporarily during the execution of the operation. This temporary register is not accessible by the programmer.
The 8085 Bus Structure
The 8-bit 8085 CPU (or MPU – Micro Processing Unit) communicates with the other units using a 16-bit address bus, an 8-bit data bus and a control bus.
Address Bus
The address bus has 8 signal lines A8 – A15 which are unidirectional.
The other 8 address bits are multiplexed (time shared) with the 8 data bits.
16 address lines are capable of addressing a total of 216 = 65,536 (64k) memory locations.
Address locations: 0000 (hex) – FFFF (hex)
Identify perifheral or memory locations

5. The 8085 Bus Structure Data Bus Consists of 8 data lines: D0 – D7
Fig2. The 8085 Bus structure
Data Bus
Consists of 8 data lines: D0 – D7
Operates in bidirectional mode
Data range: 00 (hex) – FF (hex)
use for transferring data
Control Bus
Consists of various lines carrying the control signals such as read / write enable, flag bits.

6. The 8085 programmable registers
Six general purpose 8-bit registers: B, C, D, E, H, L
They can also be combined as register pairs to perform 16-bit operations: BC, DE, HL
Registers are programmable (data load, move, etc.)
Accumulator
Single 8-bit register that is part of the ALU .
Used for arithmetic / logic operations – the result is always stored in the accumulator.
Fig3. The 8085 programmable registers

7. The Program Counter (PC)
is used to control the sequencing of the execution of instructions.
always holds the address of the next instruction.
since it holds an address, it must be 16 bits wide.
The Stack pointer
is also a 16-bit register that is used to point into memory.
this register points to in a special area called the stack.
the stack is an area of memory used to hold data that will be retreived soon.
the stack is usually accessed in a Last In First Out (LIFO) fashion.
Memory: Where instructions (programs) and data are stored
Organized in arrays of locations (addresses), each storing one byte (8 bits) in general
A read operation to a particular location always returns the last value stored in that location
I/O devices: Enable system to interact with the world
Device interface
I/O registers are connected to external wires, device control logic, etc.
Reads may not return last value written
Writes may have side effects

8. Indicate the result of condition tests.
The Flags register
Flag Bits
Indicate the result of condition tests.
Carry, Zero, Sign, Parity, etc.
Conditional operations (IF / THEN) are executed based on the condition of these flag bits.
There is also the flags register whose bits are affected by the arithmetic & logic operations.
S-sign flag
The sign flag is set if bit D7 of the accumulator is set after an arithmetic or logic operation.
Z-zero flag
Set if the result of the ALU operation is 0. Otherwise is reset. This flag is affected by operations on the accumulator as well as other registers. (DCR B).
AC-Auxiliary Carry
This flag is set when a carry is generated from bit D3 and passed to D4 .
P-Parity flag
After an ALU operation if the result has an even # of 1’s the p-flag is set. Otherwise it is cleared. So, the flag can be used to indicate even parity.
CY-carry flag
After an operation, if the result in the accumulator is larger than 8 bits, the flip-flop that is used to indicate a carry, called the carry flag. S Z AC P CY

9. 8085 Instruction Set Between registers Data transfer operations
Between memory location and a register
Direct write to a register / memory
Between I/O device and accumulator
Arithmetic operations (ADD, SUB, INR, DCR)
Logic operations
Branching operations (JMP, CALL, RET)

11. Hardware Description uPC-MICRO 8085 system consists
crystal controlled oscillator
buffers for address
data control signals
two 8255 (Programmable Peripheral Interface)
one 8279 (Programmable keyboard & display controller)
one 8253 (Programmable interval timer)
one 8259A (Programmable Interrupt Controller)
One 8251A (Programmable Communication Interface) with RS232C drivers & receivers.
8 digit seven segment display
32 keys with one RESET key in keyboard

12. Base port address in Hex
Memory decoding & addresses
System EPROM : 0000 to 0FFF (32K)
RAM (CMOS) : 8000 to 9FFF (8K)
(8000 to 97FF user RAM)
(9800 to 9FFF system RAM)
Expansion RAM : A000 to BFFF (8K)
C000 to DFFF (8K)
I/O decoding and addresses
SL. No.
Peripheral LSI
Base port address in Hex
01.
A8255 00
02.
B8255 20
03.
8251A 10
04.
8253 30
05.
8257 08
06.
8259A 28

13. Display interface Keyboard interface Serial interface
Once a data is written to 8279 display RAM, 8279 automatically refreshes the data on 8 digit 7 segment LED display.
One can optionally connect a LCD module to the port lines of the connector provided and writing the necessary software.
Keyboard interface
16 keys are assigned for 16 hexadecimals
16 keys for executing different functions
1 key mounted on the motherboard
Serial interface
duplex serial communication interface
use 8251A serial communication controller with RS232C drivers at its output & RS232C receivers at its input
Software description
At power on or at manual RESET, the CPU starts execution. Before executing the main routine, the various peripherals, flags and parameters in RAM are initialized.

14. Keys and Key Functions RESET INC STEP BREAK EXEC/GO REG HELP MOVE
Single Star (*)
Double Star (**)
FILL
INS
DEL
OUTPUT
INPUT
DOWNLOAD
DEC

15. Executing a program in uPC-MICRO 8085
Label
Mnemonics
Op-code Operand
Hex Code
Memory address
START
MVI A, ECH
3E, EC
MVI B, F1H
06, F1
MVI C, 00H
0E, 00
ADD B 80
8006
JNC LOOP1
D2, 0B, 80
INR C 0C
800A
LOOP1
STA
32, 90, 80
800B-0D
MOV A, C
STA 79
32, 91, 80
800E
800F-11
END
HLT 76
8012

16. The 8085 and 8086 Microprocessors
Fig4. Pin layout of the 8085 and 8086 microprocessor

17. Features of 8086 μp Execution Unit (EU) FLAG Register
CPU is divided into BIU & EU
Execution Unit (EU)
tells the BIU where to fetch instructions or data from, decodes instructions and executes instructions
Has a 16 bit arithmetic logic unit
Decode instructions and done internal operations
FLAG Register 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 / O D I T S Z A P C
Control Flags
Trap flag (TF) >> used for single stepping through a program
Interrupt flag (IF) >> used to allow or prohibit the interruption of a program
Direction flag (DF) >> used with string instructions
Conditional Flags
Carry Flag (CF), Parity Flag (PF), Auxiliary Carry Flag (AF), Sign Flag (SF) ,Zero Flag (ZF)
& Overflow Flag (OF) >> will be set if the result of a signed operation is too large

18. 8086μpU internal architecture
General register
a. Data register (AX (AL & AH), BX (BL & BH), CX (CL & CH), DX (DL & DH)) used to store data
b. Pointer & Index register (16 bit)
Stack Pointer (SP) >> holds the 16 bit offset from the start of segment
Base Pointer (BP) >> holds the 16 bit offset and used for temporary store of data
Source Index (SI) >> holds the 16 bit offset of data word in the data segment
Destination Index (DI) >> used to indirect addressing & operation and temporary store of data
Fig5. General purpose registers

19. Instruction Pointer (IP)
Bus Interface Unit (BIU)
handles all transfers of data & addresses on the buses for the execution unit
The Queue
stores prefetched bytes in first-in-first out fashion for EU
Fetching the next instructions when the current instruction executes is called pipelining
Extra Segment (ES)
Code Segment (CS)
Stack Segment (SS)
Data Segment (DS)
Instruction Pointer (IP)
Fig6. Segment registers
used to hold the upper 16 bits of the starting addresses of four memory segments
Segment address (3000H) H
Offset address (1234H) H
Real address H

20. Introduction to the MTS-86C microprocessor
CPU or “brain”
ROM has addresses F0000H through FFFFFH and non-volatile
RAM has addresses 00000H through 10000H and volatile
Keyboard/display interface ( an 8279 device)
24 Key Keyboard
Display: LCD
Expansion area (upper left-hand side)
Prototyping area (left-hand side)
Reset
Volatile memory
16 of data line and 20 of address line

21. Function of Keypad Memory
RESET, NMI, +, -, ., REG, :, “,”, EB/AX, ER/BX, GO/CX, ST/DX, IB/SP, OB/BP, MV/SI, EW/DI, IW/CS, OW/DS, SS, ES, IP, FL,
Memory
FFFFFH
MONITOR PROGRAM
ROM
Exercise Program
USER MEMORY
ROM, RAM
OPEN
User program
RAM
INTERRUPT VECTOR TABLE
F8000H
F0000H
E0000H
10000H
400H 0H

22. I/O Port address assignments
Port function
FFFFH
FFFDH
FFFBH
FFF9H
PPI-1 control word resister
PPI-1 C port
PPI-1 B port
PPI-1 A port
Parallel I/O No. 1
FFFEH
FFFCH
FFFAH
FFF8H
Parallel I/O No. 2
FFF2H
FFF0H
command
data
RS232C PORT 1
FFE8H
8279 Status or Command
8279 Data
Keypad control
FFDEH
FFDCHFFDAH
FFD8H
8253 Command
8253 Count 2
8253 Count 1
8253 Count 0
Counter & Timer
FFD2H
FFD0H
Command
data
RS232C PORT 2
Port address
Port function
FFCAH
FFC8H
8259 Command
8259 Data
Interrupt control
3FF0H
FND
Display
3FD8H
D/A Converter
8 bit D/A converter
3FD6H
3FD4H
3FD2H
3FD0H
PPI-1 control word resister
PPI-1 C port
PPI-1 B port
PPI-1 A port
Experiment for 8 bit output and input
3FCEH
3FCCH
3FCAH
3FC8H
A/D Converter IN3/IN7
A/D Converter IN2/IN6
A/D Converter IN1/IN5
A/D Converter IN0/IN4
8 bit A/D Converter

23. Example : *Knowing that, DS=2042H. SI=500H, AX=214E, MOV [SI],AX ; AHAL 21 4E 21
20921H 4E
20920H
SI=500
DS=20420H
DS=2042H

24. 24 Executing a program in MTS-86C Label Mnemonic Hex code
Memory address
Remarks
CODE
SEGMENT
0040:
ASSUME CS: CODE & DS: CODE
Result will be
MOV AX, 1234H
B8, 34, 12
00, 01, 02
stored in AX
MOV CX, 0034H
B9, 34, 00
03, 04, 05
ADD CX
03, C1
06, 07
HLT F4 08
ENDS
END 24

25. History of microprocessor
8008
8080
8085
8086
Number of instructions 66
111
113
133
Number of flags 4 5 9
Maximum memory size
16K bytes
64K bytes
1 M bytes
I/O ports
8 input
24 output
256 input
256 output
64K input
64K output
Number of pins 18 40
Address bus width 8 16 20
Data bus width
Introduction date
1972
1974
1976
Q-6,500 at 3 µm
1978
Q-29,000 at 3 µm

26. What Are Microcontrollers?
Microprocessor – Microcontroller what's the diff?
Microprocessors can not stand alone
instruction decoder, ALU, address/data. busses, timing logic, (CPU)
Has no capability to interact with the outside world
memory, I/O ports, UARTS, etc. must be added to make it useful
Microcontrollers are small computing systems on a single chip
Central Processing Unit (CPU)
Program memory
Random Access Memory (RAM)
EEPROM - Electrically Erasable Programmable Read Only Memory
A variety of peripheral devices
USARTs, Timer/Counters, ADC, DAC, I/O Ports, CANs, SPIs etc.

27. Why not a Computer ? Why MCU
• Suppose we want to make a Line following Robot
• What do we do ?
• Use a computer with 2.4Ghz Intel core I7 with 4 Gb RAM , 500 Gb Hard disk , 1 Gb Graphics
Card ??
Why not a Computer ?
• PC is a general purpose computer.
• Can run thousand of software's
• Games (NFS , AOE , Call of Duty)
• Highly expensive
Why MCU
• Small reflected by the word “MICRO”
• Inexpensive
• Ideal for doing repetitive tasks
• Easy to use
• Highly Efficient and fast

28. ATmega8(L) microcontroller
The Atmel ®AVR® ATmega8 is a low-power CMOS 8-bit microcontroller based on the AVR RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega8 achieves throughputs approaching 1MIPS per MHz, allowing the system designer to optimize power consumption versus processing speed.
Fig7. Pin configuration of ATmega8(L)

29. Conclusion
Finally, you should write a report with clear conception for different contents described above.
References
Microprocessor Architecture, Programming and Applications with the 8085/8080A
by Ramesh S. Gaonkar
Microprocessors and Interfacing
by Douglas V Hall
and
Internet

30. Thanks to all ??