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§4.1 The von Neumann Architecture Douglas Wilhelm Harder, M.Math. LEL Department of Electrical and Computer Engineering University of Waterloo Waterloo,

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Presentation on theme: "§4.1 The von Neumann Architecture Douglas Wilhelm Harder, M.Math. LEL Department of Electrical and Computer Engineering University of Waterloo Waterloo,"— Presentation transcript:

1 §4.1 The von Neumann Architecture Douglas Wilhelm Harder, M.Math. LEL Department of Electrical and Computer Engineering University of Waterloo Waterloo, Ontario, Canada ece.uwaterloo.ca © 2012 by Douglas Wilhelm Harder. Some rights reserved. Based in part on Gary Nutt, Operating Systems, 3 rd ed.

2 Chapter 4: Computer Organization Topics: –The von Neumann architecture –The central processing unit –Main/primary/executable memory –I/O devices –Interrupts –Conventional contemporary memory –Mobil computers –Multiprocessors and parallel computers 2

3 Outline This topic looks at the von Neumann architecture –The 1800s –The 1930s and 1940s –The von Neumann architecture One main memory –The Harvard architecture Instruction memory and data memory The von Neumann Architecture 3

4 Early 1800s The first programmable computer was described in 1836 –Charles Babbage saw how a programmable loom could be generalized to perform programmed calculations –His 1937 paper On the Mathematical Powers of the Calculating Engine described his ideas The von Neumann Architecture Andrew Dunn Photography 4

5 1930s and 1940s Prior to the 1930s, all electronic devices were dedicated to perform a particular task –In the late 1930s and early 1940s, a civil engineer from Germany, Konrad Zuse, developed the first programmable electronic computer –The program was read from a tape –By 1940, he was using 22-bit floating-point numbers –This first electronic computer was Turing complete That is, anything that can be computed can be computed by this machine...it might just take longer The von Neumann Architecture 5

6 1930s and 1940s In the 1940s, John von Neumann et al. determined: It is evident that the machine must be capable of storing in some manner not only the digital information needed...but also the instructions which govern the actual routine to be performed on the numerical data... Hence there must be some organ capable of storing these program orders. There must, moreover, be a unit which can understand these instructions and order their execution. Conceptually we have discussed above two different forms of memory: storage of numbers and storage of orders. If, however, the orders to the machine are reduced to a numerical code and if the machine can in some fashion distinguish a number from an order, the memory organ can be used to store both numbers and orders. The coding of orders into numeric form is discussed in 6.3 below. If the memory for orders is merely a storage organ there must exist an organ which can automatically execute the orders stored in the memory. We shall call this organ the Control. The von Neumann Architecture 6

7 Von Neumann Architecture Based on this, von Neumann et al. proposed that both data and instructions be stored in the same memory –Both data and instructions would be accessed through one bus –Care must be taken to avoid overwriting machine instructions inadvertently The von Neumann Architecture 7

8 Von Neumann Architecture This isnt the only model and there are drawbacks: –You cannot access data and instructions simultaneously –This is the von Neumann bottleneck –Consider image processing: making a small number of changes to large quantities of datathis causes a factor-of-two slowdown The von Neumann Architecture 8

9 Harvard Architecture In a different model, there are separate data and instruction memories –The hardware is more complex, but it is potentially faster The von Neumann Architecture 9

10 Von Neumann Architecture We will examine the components of the von Neumann architecture over the next few lectures: –A Central Processing Unit Comprised of a Control Unit and an Arithmetic Logic Unit –Main Memory –I/O Devices –A system bus connecting these devices The von Neumann Architecture 10

11 Von Neumann Architecture As a quick overview: –The CPU is comprised of: A Control Unit (CU) that decodes and executes instructions An Arithmetic Logic Unit that performs mathematical and logic operations –Main memory that allows longer term temporary storage –I/O devices for external communication The von Neumann Architecture 11

12 Von Neumann Architecture All these are connected by a system bus: –An address bus transmits addresses –A data bus for data –A control bus for issuing instructions to other devices The von Neumann Architecture 12

13 Summary This topic covered the von Neumann architecture –The Babbage machine –The 1930s and 1940s –The von Neumann architecture One main memory –The Harvard architecture Instruction memory and data memory The von Neumann Architecture 13


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