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THE LOCATOR R. F. LOCATION SYSTEM MIKE GOULD KARA MCMILLIN MARCUS PEARLMAN CHRIS SINKEY JACOB WILTGEN TEAM ZISSOU presents….

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Presentation on theme: "THE LOCATOR R. F. LOCATION SYSTEM MIKE GOULD KARA MCMILLIN MARCUS PEARLMAN CHRIS SINKEY JACOB WILTGEN TEAM ZISSOU presents…."— Presentation transcript:

1 THE LOCATOR R. F. LOCATION SYSTEM MIKE GOULD KARA MCMILLIN MARCUS PEARLMAN CHRIS SINKEY JACOB WILTGEN TEAM ZISSOU presents….

2 Power Rectifier Amplifier 68HC11 Microcontroller USB Interface Receiving Antennas Transmitting Antenna R.F. Location Project Compass Design Transmitting Antenna sends power signals Antenna arrays receive power signal Power is rectified and amplified DC power signal is analyzed 2-D Location outputs to Computer, LCD, or PDA Bill Murray still confused.

3 Transmitter Receive Antenna DC Converter A/DMicrocontroller Antenna 1 Antenna 2 Possibly: Construct Antenna 3 PCLocation Algorithm Output: Display Output: Direction Antenna Array Block Diagram System Block Diagram

4 + Phase Shifters Shottky Diode / Rectifier / Filter Antenna Array Design Digital Control pins 50 Ω line λ/4(1/ε r )

5 Phase Shifter Pin-out

6 Receiving Array: 5 Element Power Pattern 0 deg 10 deg20 deg 30 deg 40 deg

7 Receiving Array: 7 Element Power Pattern 0 deg 10 deg20 deg 30 deg40 deg

8 Rectification to Amplification: GHz Power Signal rectified immediately Using a Schottky Diode: Surface Mount Low Barrier X-Band: MACOM part # MA4E2054 RF input RF input On Antenna Board DC output To control Board Schottky Diode output will be a low level DC Voltage (~mV) Amplification must take place to guarantee proper A/D conversion: Amplification using LF356 op-amp (easy, low noise, cheap)

9 Antenna Signal Filtering: Implementing a LF356 op-amp to create a Sallen-Key Low Pass Filter Design f c = 5kHz Design f c = 5kHz Additional LPF with RC filter Additional LPF with RC filter

10 MC68HC11 A/D One of 8 channels implemented (PE0: pin59) OPTION control Register: on start-up $1039 (enable A/D): ADPU: A/D Power Up: (1) Enables A/D capabilities CSEL: Clock Select Enable: (0) Use E Clock (2Mhz) A/D Control/Status Register: (ADCTL) $1030 (Define A/D parameters): __ SCAN: Continuous Scan Control bit: (0) not used MULT: Multiple-Channel Control bit: (0) single channel used CD,CC,CB,CA: Channel Select Bits: 0000 = PE0

11 Processor, Bus Driver, and Latches

12 Chip Select, EPROM, SRAM

13 Antenna Control

14 Communication with Peripherals RS-232 interface with user Use a CAN bus to link antennas A balanced, 2-wire interface running over a Shielded Twisted Pair NRZ encoding reduces disturbances CAN bus RS-232

15 Software Executive Main Loop Task specific - latch data gathered on command Subtasks Read data on latches Compare data from latches to determine highest power reading Find a location with a simple distance algorithm: Output visual display on a dummy terminal for user Antenna 1 Antenna 2 Transmitter ø z d * Know Z and ø, can find d

16 Updated Schedule:

17 Labor Division for 1 st Milestone Chris Antenna designed and tested (including Shottky diode) PCB board submitted for build Jake/Kara Control board running and tested (inputs and outputs) Begin software implementation Mike Ordering phase shifter and Shottky diode Amplifier designed and tested on control perf board Marcus Transmitter designed and tested Wire-wrap the transmitter on a perf board

18 COSTS (EXPECTED) Received $1191 from UROP 1191 Phase Shifters cost -725 Need 5 shifters per array = 5*2*72.50 PCB boards 33.00*3 -99 General supplies used thus far -100 Wire wrap, resistors, caps, chips, etc. Remaining funds = 267

19 Questions?


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