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ISA BUS (Industry Standard Architecture) Cahit Tarık Genç.

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Presentation on theme: "ISA BUS (Industry Standard Architecture) Cahit Tarık Genç."— Presentation transcript:

1 ISA BUS (Industry Standard Architecture) Cahit Tarık Genç

2 What is BUS ? A bus connects all the internal computer components to the CPU and Main memory. Every bus has a clock speed measured in MHz. A fast bus allows data to be transferred faster, which makes applications run faster. On PCs, the old ISA bus is being replaced by faster buses such as PCI.

3 I/O BUS System Bus: Connecting to CPU, memory and Cache. Address Bus Data Bus Control Bus I/O Bus: Connecting to the above three buses is the "good old" standard I/O bus, used for slower peripherals (mice, modems, regular sound cards, low-speed networking) and also for compatibility with older devices. On almost all modern PCs this is the Industry Standard Architecture (ISA) bus.

4 Types of I/O Buses ISA Micro Channel (MCA) EISA VESA Local bus (VL-bus) PCI Local bus AGP PC-Card (PCMCIA) USB Fire Wire (IEEE-1394)

5 I/O BUS ISA BUS (8-16-bit) EISA BUS (32-bit) PCI BUS (32 or 64-bit) AGP (32-bit)

6 ISA BUS In 1982 when ISA BUS appeared on the first PC the 8-bit ISA bus ran at a modest 4.77 MHZ – the same speed as Intel ISA BUS is extremely slow by today's standards and not suited to the use of a graphical operating system like Windows.

7 ISA BUS In 1984 the IBM AT was introduced using the Intel 80286; at this time the bus was doubled to 16 bits (the 80286's data bus width) and increased to 8 MHz (the maximum speed of the original AT, which came in 6 MHz and 8 MHz versions and 24 address lines).

8 ISA BUS 8-bit 16-bit

9 ISA BUS Bus width8 - bit Compatible with8 bit ISA Pins 62 Power+5 V, -5 V, +12 V, -12 V Clock MHz Bus width16 - bit Compatible with16 bit ISA Pins 98 Power+5 V, -5 V, +12 V, -12 V Clock MHz 8-bit ISA BUS 16-bit ISA BUS

10 ISA BUS is used with sound cards, disk drives or most network and video cards. 8-bit ISA(XT) CARD 16-bit ISA CARD


12 ISA BUS Original 8 bit ISA connectors Additional connections converts to 16 bit ISA VESA connectors

13 ISA BUS In the figure you can see the pinouts of the ISA BUS. The BUS is divided into two sides. The first side pins are named A1 to A31 and it is the components side. It consists of the address and data buses. The second side pins are named B1 to B31 and it is the solder side. This side contents the power pins and the signals related to interrupts and DMA transfers.

14 ISA BUS 20 bits of Address bus ± 5, ±12V Power & G IRQ lines 2-7 IRQ lines Extra 8 bits of I/O bus Extra 4 bits of Address bus More DMA lines clock Original 8 bit ISA 16 bit More DMA lines 8 bits of I/O bus

15 ISA BUS A0-A19 (pins A31 to A12): This twenty lines are the address BUS.They can address 1MB (2^20 bytes). D0-D7 (pins A9 to A2): The data BUS consist of this eight data lines. AEN (pin B11): It is used for the DMA controller to take over the data and address buses in a DMA transfer. GND (pins B1, B10, B31): Connected to the ground of the computer. +5V (pins B3, B29): 5V DC output of the power source. -5V (pin B5): -5V DC output. -12V (pin B7): -12V DC output. +12V (pin B9): +12V DC output. MEMW (pin B11): The µP asserts this signal when doing a write to the memory. MEMR (pin B12): The µP asserts this signal when doing a read from the memory. IOW (pin B13): The µP asserts this signal when doing a write to a port. IOR (pin B14): The µP asserts this signal when doing a read from a port. DACK0-DACK3 (pins B15, B17, B19 and B26): The DMA controller sets this signals to let a device know that the DMA has the control of the buses. DRQ1-DRQ3 (pins B6, B16 and B18): Allow the peripheral boards to request the use of the buses. +T/C (pin B27): The DMA controller sets this signal to let the peripheral know that the programmed number of bytes has been sent. IRQ2-IRQ7 (pins B4, B21, B22, B23, B24 and B25): Interrupt signals. The peripheral devices sets this signals to request for the attention of the µP. ALE (pin 28): This signal is used for the µP to lock the 16 lower address BUS in a latch during a memory (or port) input/output operation. CLOCK (pin 20): Is the system clock. OSC (pin 30): Is a high frequency clock which can be used for the I/O boards.

16 Describing the Read operation of the ISA CPU sends out a high on the ALE signal, then sends out the A0-A19 lines. On the address of the target port to be read will be latched. Then the BUS takes the -IOR signal to a low level. So that the addressed device will take a data byte to the D0- D7 data bus. The microprocessor will read then the data bus and take the - IOR signal to a high again.

17 Describing the Read/Write operation of the ISA The only difference between a memory read/write cycle and a port read/write cycle is that in a memory cycle the -MEMR and -MEMW signals will be asserted, working the same way as -IOR and -IOW do.

18 ISA BUS Intel 80386DX CPU Address bus(32 bit) Data bus (32 bit) A 0 to A 31 D 0 to D 31 RD WR IO/M Control bus I/O bus (16 bit data) Storage Printer Video Modem Memory Keyboard

19 Bus Structure of Intel 486 ISA BRIDGE

20 Bus Structure of Intel Pentium North Bridge South Bridge

21 Bus Structure of Intel Pentium Expansion Bus Controller M/IO #(memory or i/o address) D/C# (Data or code) W/R# (Write or Read) AEN# A31-A3 (Address Lines) BE7# - BE0# (Byte Enable Lines) CLK BRDY# (Burst Ready) CPU BusPCI Bus AD[31:0] C/BE#[3:0] FRAME# TRDY# IRDY# STOP# REQ# GNT# D31-D0 NORTH BRIDGE

22 Bus Structure of Intel Pentium Expansion Bus Controller CLK MEMR# MEMW# IOR# IOW# INTA# A23-A0 PCI BusISA Bus AD[31:0] C/BE#[3:0] FRAME# TRDY# IRDY# STOP# REQ# GNT# D23-D0 SOUTH BRIDGE ALE

23 ISA BUS INTERRUPT SYSTEM 16-bit ISA bus chains two 8259As together. IRQ 9 is used to re-route anything trying to use IRQ 2. Incorporated in chip set.

24 INTERRUPT CONTROLLER 80x86 INTR 8259A IRQ0 IRQ1 IRQ2 IRQ3 IRQ4 IRQ5 IRQ6 IRQ7 8259A IRQ0 (8) IRQ1 (9) IRQ2 (10) IRQ3 (11) IRQ4 (12) IRQ5 (13) IRQ6 (14) IRQ7 (15) (IRQ 2)

25 Elimination of ISA Bus ISA Bus is slow, hard to use and bulky. ISA plug in cards to be replaced by either PCI plug-in cards or USB add-on peripherals Limited number of interrupts. No central registry.

26 Elimination of ISA Bus The ISA bus is limited to 24 bits of address. 2^24 = 16 MBytes. It means that an ISA card that uses DMA cannot physically access memory beyond 16 MBytes of RAM. This is a limitation of the ISA bus.

27 Elimination of ISA Bus Motherboard gets 32-bit data from ISA BUS at two times. Meanwhile at this time ISA BUS declares wait state to the motherboard. Therefore ISA BUS may reduce System Performance.

28 Elimination of ISA Bus If you use a ISA based controller card such as Ultra SCSI - 40Mb / sec or SCSI-2 Fast - 10 Mb / sec, you can expect no more than an 8Mb per second transfer rate from your controller card.

29 Elimination of ISA Bus PCI cards have Plug and Play technology and can configure themselves, so Operating Systems distinguish them. ISA cards are more cumbersome to install than other cards because I/O addresses, interrupts and clock speed must be set using jumpers and switches on the card itself.

30 Elimination of ISA Bus Bus TypeMB/sec VL-bus100 MBps VL-bus132 MBps 32-Bit PCI132 MBps PCI-X MBps PCI-X 1331 GBps AGP x1264 MB/s AGP x2528 MB/s AGP x41056 MB/s AGP x82112 MB/s PCI Express x1500 MB/s PCI Express x21000 MB/s PCI Express x42000 MB/s PCI Express x84000 MB/s PCI Express x MB/s PCI Express x MB/s

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