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Hardware Integration of the Prototype Wes Grammer NRAO September 24-26, 2012EOVSA Prototype Review1.

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Presentation on theme: "Hardware Integration of the Prototype Wes Grammer NRAO September 24-26, 2012EOVSA Prototype Review1."— Presentation transcript:

1 Hardware Integration of the Prototype Wes Grammer NRAO September 24-26, 2012EOVSA Prototype Review1

2 Outline Hardware integration flow chart Integration steps and associated tests Proposed schedule September 24-26, 2012EOVSA Prototype Review2

3 Hardware Integration Flowchart September 24-26, 2012EOVSA Prototype Review3

4 Timing Subsystem Integration Install modules in Timing/LO rack, cables per subsystem diagram Power up and initialize PRD-16 via RS-232 port (script file on ACC, or standalone Labview GUI) Power up TGD module: – Check 10 MHz output ports w/spectrum analyzer – Check 50 Hz and 1PPS outputs with digital oscope – Measure 1PPS optical power at patch panel (16) At cRIO in antenna servo cabinet: – Measure 1PPS pulse output width and amplitude – Measure pulse latency at each antenna (necessary?) September 24-26, 2012EOVSA Prototype Review4

5 LO Subsystem Integration (1 of 2) Install modules in Timing/LO rack, all cables per subsystem diagram LO1-A synthesizer tests: – Verify basic monitor and control interface functions, using spectrum analyzer. – Test list tuning mode with spectrum analyzer or counter at lower switching rate. – Verify frequency switching and output power settling at 50 Hz rate (how to do this?) September 24-26, 2012EOVSA Prototype Review5

6 LO Subsystem Integration (2 of 2) LO Distribution Module tests – Connect LO1-A, terminate LO1-B input port – Record LO1 and LO2 power at end of each LO cable, on Downconverter side, with constant LO1-A drive power setting, at each LO1 frequency. – Set up tuning table to remove loss slope in LO1 cables, run it and re- check power. – Adjust LO2 drive amplifier level as needed (pad swap) Check RS-485 bus for proper function and reliable operation, using looped R/W test on ACC. Verify monitor and control functions using ACC control software, with power meter or spectrum analyzer on outputs. Temporarily connect synthesizer to LO1-B input, and repeat above tests for LO1 (tuning tables may differ) September 24-26, 2012EOVSA Prototype Review6

7 Downconverter Integration Install power supply panel Install subracks and cooling fans Install Downconverter and all associated cables, including M&C bus termination. Attach a loopback jumper to spare fiber in Auxiliary cabinet at the corresponding antenna. Use RF synthesizer w/laser transmitters + diplexer to provide test source. Verify all basic monitor and control functions with ACC over RS-485 bus Measure bus trigger latency, verify if < 10 us. Add detector calibration formula to control software, to obtain correct dB scale readout of 1 st mixer input power. Vary input power, and check that ACC software is adjusting attenuator to level output power to Correlator September 24-26, 2012EOVSA Prototype Review7

8 Front End Assembly Integration (1 of 2) Recheck voltages on Front End power cables Install Front End module and apex mounting plate, connect all cables; DC power is off. Connect laptop to TE controller in Auxiliary chassis, run monitoring software Power the TE +24V and +12V, verify correct temperature control system operation at several setpoints. Power up the remaining supplies, and verify stable internal temperature. Verify basic function of Ethernet M&C interface with cRIO September 24-26, 2012EOVSA Prototype Review8

9 Front End Assembly Integration (2 of 2) Check for cable stresses, module clearance over range of telescope movement Point at a strong fixed in-band sources (L-band RFI, Ku- band, verify signal presence at IF output with spectrum analyzer. Verify proper focal point position for feed, adjust Test monitor and control functions, trigger signal, using IF output level Move dish off-source: – Check detected power in Downconverter, at nominal Front End attenuator settings, to verify expected system gain. – Measure Tsys on both polarizations – Use attenuators to verify correct polarization correspondance September 24-26, 2012EOVSA Prototype Review9

10 Proposed Integration Schedule Timing subsystem: end of October 2012, or after racks arrive and outfitted for AC power LO subsystem: end of November Assumes LO rack is ready for module install. Downconverter #1 and #2: early December 2012 Front Ends 1-3, Downconverter #3: January 2013 September 24-26, 2012EOVSA Prototype Review10

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