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Benchmarking Microelectronics Innovation: Understanding Moores Law and Semiconductor Price Trends Kenneth Flamm Technology and Public Policy Program Lyndon.

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Presentation on theme: "Benchmarking Microelectronics Innovation: Understanding Moores Law and Semiconductor Price Trends Kenneth Flamm Technology and Public Policy Program Lyndon."— Presentation transcript:

1 Benchmarking Microelectronics Innovation: Understanding Moores Law and Semiconductor Price Trends Kenneth Flamm Technology and Public Policy Program Lyndon B. Johnson School of Public Affairs University of Texas at Austin

2 Outline n Why Do We Care? n Moores Law n The Economics of Moores Law n The Economic Impact of Moores Law n Benchmarking Moores Law n Tinkering with Moores Law n Point of Inflection? n Official Data on Semiconductor Prices n Better Benchmarking

3 Key Economic Features of the Semiconductor Industry n Extremely rapid technical progress n Large R&D Investments n Learning Economies n Capital Intensity n Capacity Constraints, Long Gestation Lags n One Complicated Industry

4 Why Do We Care? n Now largest U.S. manufacturing industry u Measured by value added n One 4-digit manufacturing industry now almost 1% U.S. GDP n Most important input to other industries we care a lot about u Computers, communications u Big impact on GDP, productivity growth u See Jorgenson AEA 2001 Presidential Address.

5 Changing Size: U.S. semiconductor mfg val added vs. GDP n 1958 n 1965 n 1975 n 1985 n 1995 n 1997 n.04% n.09% n.13% n.26% n.70% n.77%

6 Moores Law n In the beginning: the original law u 2x devices/chip every 12 months u ca n Moore rev.2 u 2x devices/chip every 18 months u ca n Self-fulfilling prophecy? u it happened because everyone believed it was going to happen u The receding brick wall

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8 Economics of Translating Moore into $ and ¢ $/device = $ processing cost area silicon Area/chip _____________________ Devices/chip New technology node every 3 years Lithography advance means.5X area per chip feature Moores law4x devices/chip every 3 years Would predict Area/chip 2X every 3 years $ processing cost/wafer area roughly constant CADR = -21%

9 An Economists Default Corollary to Moores Law: Moores Law + constant wafer processing cost + new technology node every 3 years = -21 % CADR

10 The Ingenuity (DRAM) Corollary: n Instead of doubling chip size, use ingenuity to increase it only Z (Z < 2) times u real recent example (DRAMs), Z=1.37 u 3-D device structures n Implications of ingenuity u for DRAMs recently, CADR = -30% u for DRAMs, in 70s and 80s, wafer processing cost also fell, CADR more like -37% F Japan/VLSI project, competition impact? n Another example is ASICs, more rapid leading edge technology adoption u transitory impact on CADR

11 Benchmarking Moores law: Differences in Semiconductor Price Movements Are HUGE Source: Aizcorbe, Flamm, and Khurshid (2001).

12 Implications for Input Prices in Different User Industries Also Great Source: Aizcorbe, Flamm, and Khurshid (2001).

13 Accounting for the economic impact of Moores Law n The standard model n Estimated cost decline n Estimated price elasticity n Calculations of benefits

14 The Standard Model: Consumers Surplus

15 The Numbers: Summary of Consumer Welfare Calculations Benefit in 1995 of Billion $ Percent of GDP Percent of 1995 GDP Growth 1 years price decline 20 years price declines 30 years price declines

16 Magnitudes n 1 years tech improvement yields.16% GDP …forever n 20 years tech improvement would cost you about 5 percent of GDP if rolled back n If youre feeling really brave, roll the clock back 30 years and you shave off up to 20 percent of GDP!

17 More Comparisons n Other well-studied cases-- the railroads in the 19th century n The old guys vs. the new guys: a historical parable

18 Tinkering with Moores Law: The Technological Acceleration (Sematech Roadmap) Corollary n Suppose new technology node every 2 years instead of 3 u Industry coordinated push through Sematech in late 1990s u Competitive pressures also pushed n New default (2X chip size) CADR = - 29% n New DRAM (1.37X chip size) CADR = -41% n Constant chip size (1X chip size) CADR = -50%

19 Decline Rates in Price-Performance Percent/Year Microprocessors, Hedonic Index DRAM Memory, Fisher Matched Model DRAMs, Fisher Matched Model, Quarterly Data 91:2-95: :4-98: Intel Microprocessors, Fisher Matched Model, Quarterly Data 93:1-95: :4-99: Sources: Flamm (1997); Aizcorbe, Corrado, and Doms (2000) Point of Inflection?

20 Change of Pace?

21 Implications of This Interpretation of Moores Law n Ultra-high rate of innovation in late 1990s temporary n Transitory factors increased innovation above long-term sustainable rates u Shortened product lives u Intensified competition u More rapid adoption of leading edge processes in other products n Future CADR will look more like –40% than –60%+ n Economic impacts may decline to lower but more sustainable rates

22 Benchmarking Moores Law in the U.S.: Official Statistics on Chip Prices n BEA got ball rolling, taken over by others n BLS-- Much improved for DRAMs and Microprocessors, not so hot for other products u Data sources a concern u Documentation a concern n Fed Reserve has stealth program, currently best numbers in town u Data sources a concern u Weights a concern u Possible application in estimating capacity a big concern u Access/availability outside Fed a concern

23 Comparison of BLS with Other Price Indexes for Microprocessors

24 Better Benchmarks for Semiconductor Innovation n Tracking it better in a time of change u Focus more scarce stat resources on price indexes for IT sectors, reflecting growing relative importance to economy u A real collection program for underlying price data, perhaps coordinated with industry trade organizations F Under the hood at Dataquest (& others) not a pretty story u Decent coverage of products besides memory and microprocessors u New initiatives in communications n Better understanding of R&D trends n Better coordination of public/private R&D investments


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