2 Contents Metallization structure Uses for different layers Step CoverageSputtering: yield, conditioning, methods
3 Metallization Structure The semiconductor industry uses PVD to deposit the metal that electrically connects the various parts of the IC to each other and to the outside world.There are four common structure in metallization: contacts, vias, plugs and interconnects.Contact: A hole in the Si dioxide layer that connect the transistors to the first metal layer.
4 Metallization Structure (Cont.) Via: A hole in the Si dioxide layer that connect two metal layers.Plug: A metal layer that fills either a contact or a via. Made of either tungsten (W) or aluminum (Al).Interconnect: Metal layer. The IC has more than one layer of interconnects, each layer has different name, starting with the first layer deposited, “Metal 1”, “Metal 2”, etc.
7 Glue Layer or Adhesion layer Companies commonly use the WCVD process to fill contacts/vias with tungsten. Unfortunately, if one uses WCVD to deposit W directly to SiO2, the W flakes and peels, producing many particles.Therefore, an intermediate layer is deposited between the oxide and WCVD.
8 Glue Layer (Cont. 1) The most common process: Deposit Ti layer onto silicon oxideDeposit TiN onto TiDeposit WCVDTiNTiW
9 W filled Contact/Via Ti reduce contact resistance Reacts with Si to form Silicide.Acts as Getter to reduce native oxide resistance (Ti reacts with oxygen at the bottom of the hole).TiN prevents W from peelingStop WF6 from reacting with Ti or SiO2.Called glue or adhesion layer.W carries current from Si to interconnect and called “plug”.
11 Aluminum - GeneralAl-alloys thin films were selected for the first 30 years of the IC industry.They continue to be the most widely used materials, although copper.Al has low resistivity (=2.7-cm), and its compatibility with Si and SiO2.Al forms a thin native oxide (Al2O3) on its surface upon exposure to oxygen, and affect the contact resistance.
12 Aluminum - General (cont. 1) Al thin films can also suffer from corrosion (ex. Al dry etch may leave chlorine residues on Al surface and lead to formation of HCl and then attack the Al).
13 Aluminum interconnects The material used in interconnects is not pure aluminum, but an aluminum alloy. Usually with Cu (0.5-2%), sometimes with Si.The Cu in Al-alloy slows the electromigration (EM) phenomenon. Si slows EM slightly, used in contact level to prevent spiking.Al-alloys decrease the melting point, increase the resistivity and need to be characterized (ex. Dry etch).
14 Aluminum contactAluminum can be used to fill contacts. Unfortunately, with Al you encounter a problem that don’t finds with WCVD: Si dissolves into Al at high temp (>450ºC) which cause a failure called “spiking”.
15 Al contact (Cont. 1) To prevent it We placed a barrier layer : TiN or TiW.And by using Al-Si alloy (which essentially predissolving Si into the Al).
16 Aluminum contact – process flow 1st Ti layer reduces contact resistanceTiN layer stops Si from from diffusing into Al (Barrier layer)2nd Ti layer helps Al form continues film (wetting layer)Al fills contact and forms interconnectTiNTiSiO2Al
18 Aluminum ViaIf you fill a via with Al, spiking is not a problem, since the Al dose not come into contact with any Si.Barrier layers are not necessary.Most applications do still use a layer of Ti, because Al forms a much smoother film on top of Ti than on SiO2 (Wetting layer).Al fills Via and forms interconnect.
20 ARC LayerIn the photolithography step that follows aluminum, the high reflectivity of Al can present large problem. The light can pass through the PR, reflect off of the Al and expose areas of PR that should not be exposed.
21 ARC Layer (Cont. 1)Therefore we deposit a layer that stops the light from reflecting off of the Al.The layer is called an “Anti Reflective Coating” layer or ARC layer.Common PVD layers are TiN or TiW.TiN has a very low reflectivity at a 436nm wavelength, this is the same wavelength that the resist is exposed to during photolithography.
22 TiN for Hillock Suppressant Hillock Suppressant is the second purpose for the TiN Arc layers.Hillocks are a result of stress relief between the underlying dielectric and the metal layers. This stress arises from the different thermal expansion coefficients and can cause protrusions (hillocks) of the dielectric into the metal.This is undesirable since the metal is thinner, it is more susceptible to EM.TiN has a compressive film stress, it aids in suppressing the hillocks.
25 Metal line – stack Usually the metal line contains 4-5 layers: Al - This layer makes the contacts with the Tungsten plugs. It is the primary current carrier.TiN Layer - Creates a barrier between the Al/Cu and the Titanium layers because of the increasing temperature at a downstream process will increase the rate of the reaction of Al with Ti.
26 Metal stack (Cont. 1)Titanium Layer - Provides an alternate current path (shunt) around flaws in the primary current carrier. And thus improves electromigration characteristics.
27 Metal stack (Cont. 2)TiN ARC Layer - This is an anti‑reflecting coating which aides lithography to keep control of critical dimensions and to absorb light during the resist exposure. It also functions as a hillock suppressant.
28 Last metal lineThe Titanium layers is deposited first because the last metal layer must connect to the bond pads that connect the microprocessors to the outside world. The bond pads adhere poorly to Titanium, but they adhere well to Al/Cu.The Al/Cu is deposited second.There is no TiN buffer layer between Titanium and Al/Cu layers because there are no high temperature steps.
31 What is step coverage ?It is a measure of how well the film covers topography.Definitions:to = field thk tb/to = bottom coverageTb = bottom thk tc = cusping thkH/D = Aspect Ratio (A/R)Before depositionAfter depositiontctotbHD
32 Step coverage issuesThe Aspect Ratio dependence of step coverage is critical into the submicron regime.Cusping can lead to voids.Voids in metal films can cause problems:Increased resistance.Trap impurities.Non-repeatable results.Decrease the cross sectional area that increase electromigration (high current density).
34 PVD Vs. CVD PVD Metal is transported from target to substrate. Deposition is “line of sight”.Poor step coverage (can be improved by increasing the surface-migration ability by raising the substrate temperature).CVDChemical reaction.Excellent step coverage.
35 Step coverage trends Cause: Then: Sputter CVD Electroplating Devices are getting smaller.Aspect Ratio are getting higher.Then:Planarization process bring vias with same depth.Contact to Metal 2 was allowed only through Metal 1.Vias with sloped sidewalls but have a conflict with design rules.Sputter CVD Electroplating
36 SEM interconnectsExample of contact to Metal 2 was allowed only through Metal 1.Dielectric layers etched away
38 Sputtering – GeneralSputtering is a term used to describe the mechanism in which atoms are ejected from the surface of a material when that surface is stuck by sufficiency energetic particles.Alternative to evaporation.First discovered in 1852, and developed as a thin film deposition technique by Langmuir in 1920.Metallic films: Al-alloys, Ti, TiW, TiN, Tantalum and Cobalt.
39 Reasons for sputtering Use large-area-targets which gives uniform thickness over the wafer.Control the thickness by Dep. time and other parameters.Control film properties such as step coverage (negative bias), grain structure (wafer temp), etc.Sputter-cleaned the surface in vacuum prior to deposition.
40 Sputtering steps Ions are generated and directed at a target. The ions sputter targets atoms.The ejected atoms are transported to the substrate.Atoms condense and form a thin film.
41 The billiard ball model There is a probability that atom C will be ejected from the surface as a result of the surface being stuck by atom A.In oblique angle (45º-90º) there is higher probability for sputtering, which occur closer to the surface.
42 Sputter yield Defined as the number of atoms ejected per incident ion. Typically, rangeDetermines the deposition rate.Depends on:Target material.Mass of bombarding ions.Energy of the bombarding ions.Direction of incidence of ions (angle).
43 Sputter yield (Cont. 1) Sputter yield peaks at <90º. Atoms leave the surface with cosine distribution.
44 Process conditionsType of sputtering gas. In purely physical sputtering (as opposed to reactive sputtering) this limits to noble gas, thus Argon is generally the choice.Pressure range: usually 2-3 mTorr (by glow discharge).Electrical conditions: selected to give a max sputter yield (Dep rate).
45 Sputter deposition film growth Sputtered atoms have velocities of E5 cm/sec and energy of eV.Desire: many of these atoms deposited upon the substrate.Therefore, the spacing is 5-10 cm.The mean free path is usually <5-10 cm.Thus, sputtered atoms will suffer one or more collision with the sputter gas.
46 Sputter dep. film … (Cont. 1) The sputter atoms may therefore:Arrive at surface with reduce energy (1-2 eV).Be backscattered to target/chamber.The sputtering gas pressure can impact on film deposition parameters, such as Dep rate and composition of the film.
48 Reactive sputteringReactive gas is introduced into the sputtering chamber in addition to the Argon plasma.The compound is formed by the elements of that gas combining with the sputter material (Ex. TiN).The reaction is usually occurs either on the wafer surface or on the target itself.
49 Reactive sput. (Cont. 1)In case of TiN, the Nitrogen reacts with the Ti on the surface of the target, and then it is sputtered onto the wafer.
50 RF sputteringDC sputter deposition is not suitable for insulator deposition.RF voltages can be coupled capacitively through the insulating target to the plasma, so conducting electrodes are not necessary.The RF frequency is high enough to maintain the plasma discharge.
51 RF sputtering (Cont. 1)During the first few complete cycles more electrons than ions are collected at each electrode (high mobility), and cause to negative charge to be buildup on the electrodes.Thus, both electrodes maintain a steady-state DC potential that is negative with respect to plasma voltage, Vp.A positive Vp aids the transport of the slower positive ions and slow down the negative electrodes.
52 RF sputtering (Cont. 2)The induced negative biasing of the target due to RF powering means that continuous sputtering of the target occurs throughout the RF cycle.But it is also means that this occurs at both electrodes.
53 RF sputtering (Cont. 3)The wafer will be sputtered at the same rate as the target since the voltage drops would be the same at both electrodes for symmetric system.It would thus be very difficult to deposit any material in that way.Smaller electrode requires a higher RF current density to maintain the same total current as the larger electrode.
54 RF sputtering (Cont. 4)By making the area of the target electrode smaller than the other electrode, the voltage drop at the target electrode will be much greater than at the other electrode.Therefore almost all the sputtering will occur at the target electrode.
55 Bias sputteringIn addition, sometimes sputtering of the wafer is desirable. This is done by reversing the electrical connections.One application would be for precleaning the wafer before the actual deposition.During this step, a controlled thickness of surface material is sputtered off the wafer, removing any contaminants or native oxide.A film can then be sputter deposited immediately afterward without breaking the vacuum.
56 Bias sputtering (Cont. 1) Useful for cleaning contact/vias.Sputter etching has serious problems as particles.
57 Magnetron sputteringHere magnets are used to increase the percentage of electrons that take part in ionization events, and the ionization efficiency is increased significantly.A magnetic field is applied at right angle to electric field by placing large magnets behind the target.This traps the electrons near the target surface, and causes them to move in spiral motion until the collide with an Ar atom.Dep rate increases up to times faster than without magnetron configuration.
58 Magnetron sput (Cont. 1)Magnetron sputtering can be done in either DC or RF modes, but the former is more common.Target erodes rapidly in the ring region resulting in a deep groove in the target face, which cause to non-uniformity film.
59 Collimated sputtering A small range of arrival angles during deposition can cause nonuniform film.However, if material is required to be deposited into of a deep contact/via, a large angle distribution can cause problems (like little deposition at the bottom of the via, or cusping formation).
60 Collimated sput. (Cont. 1) One way to improve this by having a narrow range of arrival angles, while atoms arriving perpendicularly to the wafer.This method called collimated sputtering (first proposed in 1992).A hexagonal holes plate is placed between the target and the wafer.
61 Collimated sput. (Cont. 2) As the sputtered atoms travel through the collimator toward the wafer, only those with nearly normal incidence trajectory will continue to strike the wafer.The collimator thus acts as a physical filter to low angle sputter atoms.
62 Collimated sput. (Cont. 3) 70-90% of atoms are filtered and therefore the Dep rate is significantly reduced.In addition the collimator should be cleaned and replaced, resulting additional downtime of the tool = COST.Suitable for contact and barrier layers where lot of material is not needed to be deposited.Benefit with cover the bottom of Via’s.
63 Collimated sput. (Cont. 4) The next figure shows the bottom coverage of collimated sputtering compared to conventional versus contact aspect ratio.
64 Hot sputteringHot sputtering is a method used to fill spaced during deposition as well as to improve overall coverage.The basic idea is to heat the substrate to >450ºC during deposition.Surface diffusion is significantly increased so that filling in spaces, smoothing edges and planarization are accomplished, driven by surface energy reduction.
65 Hot sputtering (Cont. 1)Usually, a thin “cold” deposition is done first with substrate at room temperature, which has better adhesion to the underlying material.Then is followed by hot PVD deposition.Main drawbacks is the relatively high temp. (reaction, thermal-budget, etc).
66 Manufacturing methods Thin filmEquipmentTypical reactionCommentsAlMagnetron sputter25-300ºC – standardºC –hot AlTi and TiWMagnetronTiNReactive sputteringTi + N2 (in plasma) TiNCuElectroplatingCu2+ + 2e- Cu
67 Where to Get More Information S. Wolf, Silicon Processing for the VLSI era, Vol 1-2.Peter Van Zant, Microchip Fabrication.Stephen A. Campbell, The science and engineering of microelectronic fabrication.J. D. Plummer, M. D. Deal and P.B. Griffin, Silicon VLSI technology.J.L. Vossen and W. Kern, Thin film processing II.