# Bounded-depth circuits: Separating wires from gates Michal Koucký Joint work with: Pavel Pudlák and Denis Thérien.

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Bounded-depth circuits: Separating wires from gates Michal Koucký Joint work with: Pavel Pudlák and Denis Thérien

2 Boolean circuits: x 1 x 2 x 4 x 7 x 1 x 2 x 4 x 7 non-uniform model of time bounded computation. non-uniform model of time bounded computation. Fundamental question: How large circuits does one need to compute specific Boolean functions, e.g., SAT?

3 Size of circuits = number of gates? = number of wires? Different applications use different measures counting circuits counting circuits first order logic first order logic oracle gates oracle gates Question: Arent these two measures indeed the same?

4 Answer: By counting, these two measures are different: circuits with f ( n ) gates can compute functions which no circuit with O( f ( n )) wires can compute. circuits with f ( n ) gates can compute functions which no circuit with O( f ( n )) wires can compute. Question: Is there an interesting (simple and explicit) function which demonstrates the difference?

5 Our results: Explicit function computable by AC 0 circuits with O(n ) gates but not O( n ) wires. Explicit function computable by AC 0 circuits with O(n ) gates but not O( n ) wires. Same for AC 0 [ q ] and ACC 0 circuits. Same for AC 0 [ q ] and ACC 0 circuits. (ac* bc*)* (ac* bc*)* AC 0 circuits … constant-depth circuits consisting of polynomially many,, gates. AC 0 [ q ] circuits … contain in addition MOD-q gates. ACC 0 = q AC 0 [ q ].

6 Precise characterization of regular languages computable by AC 0 circuits with O( n ) wires. Precise characterization of regular languages computable by AC 0 circuits with O( n ) wires. … unambiguous languages ( DA ) Same for ACC 0. Same for ACC 0. … languages with syntactic monoids in DO Ab. New way to analyze communication in circuits. New way to analyze communication in circuits.

7 Related results: [RW91] … poly-log threshold in AC 0 with O(n) gates. [CJ96] … Ajtais AC 0 approximate counting is not in AC 0 with O(n) gates. [CFL83] … all regular languages that are in AC 0 require only O(n g O(d ) (n )) wires. g 1 ( n ) = log n g d+1 ( n ) = ( g d ( n ) )* g 1 ( n ) = log n g d+1 ( n ) = ( g d ( n ) )*

8 Communication in circuits

9 k, X, Y k, X, Y |X|=|Y|=k k disj. paths 0< ε 1 const. |In|=|Out|=n d Super-concentrators XY k k Out In Thm [DDPW, P]: Any super-concentrator of depth d contains at least (n g d (n )) wires. True even if there are many paths between X,Ys of special form only.

10 x 1 x 2 x 3 … d y 1 y 2 y 3 … Circuit lower bounds 2 k possible outputs 2 k possible inputs AC 0 [ ] circuit for PREFIX-PARITY. PREFIX-PARITY … i-th bit of output is parity of the first i bits of the input. k k

11 Any AC 0 [ ] circuit of depth d for PREFIX-PARITY contains (n g d (n )) wires. [CFL83] Any AC 0 circuit for integer ADDITION contains (n g d (n )) wires. x 1 x 2 x 3 … d y 1 y 2 y 3 … Circuit lower bounds 2 k possible outputs 2 k possible inputs k k

12 f (X,Y ) of large communication complexity every cut S that separates information coming from X and Y is large. every cut S that separates information coming from X and Y is large. X Y Boolean function S

13 (X,Y )-cut … set S of gates such that after removing S from circuit C there is no (X,Y )- path. (X,Y )-cut … set S of gates such that after removing S from circuit C there is no (X,Y )- path. f (X,Y ) has communication complexity k f (X,Y ) has communication complexity k every (X,Y )-cut in C is of size ( k ) every (X,Y )-cut in C is of size ( k ) ( k ) vertex disjoint (X,Y )-paths in C. ( k ) vertex disjoint (X,Y )-paths in C.

14 Circuit C n computing (ac* bc*)* x 1 x 2 x 3 … x 1 x 2 x 3 … a cc … ? … ? … cc a cc … ? … ? … c a c … ? … y 1 y 2 … y 1 y 2 … k equally spaced as k equally spaced as X = {x 1, x 2, x 3 …, x k } Y = {y 1, y 2, y 3 …, y k } C n has to compute bit-wise complement of x 1 x 2 x 3 …x k and y 1 y 2 y 3 …y k. C n has to compute bit-wise complement of x 1 x 2 x 3 …x k and y 1 y 2 y 3 …y k. ( k ) vertex disjoint (X,Y )-paths in C n. ( k ) vertex disjoint (X,Y )-paths in C n.

15 Open problems Is integer ADDITION in AC 0 with linear number of gates? Is integer ADDITION in AC 0 with linear number of gates? Is (ac* bc*)* in AC 0 with linear number of gates? Is (ac* bc*)* in AC 0 with linear number of gates?

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17 X Turning C into a super-concentrator Y Y Y 2d+1 copies of C 2d+1 copies of C

18 DA satisfies: (x y z ) y (x y z ) = (x y z ) (x y z ) y (x y z ) = (x y z ) … turtle languages … disj. unions of unambiguous 1 *a 1 2 *a 2 … k * DO satisfies: (x y) ( y x ) (x y) = (x y) (x y) ( y x ) (x y) = (x y) DO Ab DO Ab … super-turtle languages … disj. unions of unambiguous L 1 a 1 L 2 a 2 … L k … exponent of M (how long one has to multiply x to get idempotent m 2 =m). … exponent of M (how long one has to multiply x to get idempotent m 2 =m).

19 Function in AC 0 computable with O(n ) gates but not with O(n ) wires: Function in AC 0 computable with O(n ) gates but not with O(n ) wires: m 2 t – 1 (i +1) 2 m – t – 1 (i +1) 2 m – t – 1 m 2 t – 1 (i +1) 2 m – t – 1 (i +1) 2 m – t – 1 ( w t ( (x j u j ) (y j v j ) ) ) ( w t ( (x j u j ) (y j v j ) ) ) t =0 i =0 j =i 2 m – t j =i 2 m – t variables x 0, … y 0, … u 0, … v 0, … w 0, …. n = 2 m

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