1. Solid state protective devices(SSPDs) for Next Gen MVDC architecture Presented By: Vikas Singh Advisor: Proff. Rob Cuzner

2. SSFID based scheme Faster switching speed leads to a reduction in the size of passives components, such as capacitors in the snubber. Higher voltage rated devices reduces the number of series connected devices in voltage blocking stacks. Hence by using SiC based devices the overall volume of the system can be much smaller

3. Hybrid DC Circuit breaker This circuit breaker is composed of a mechanical By-Pass Switch (BPS) paralleled to an static breaker. In normal conditions the current flows through the BPS that generally has negligible on state loss. At the BPS opening command time, an arc is formed across the BPS terminals, whose voltage allows current commutation into the static breaker. When the current commutation is over and the BPS is fully open, it is possible to interrupt the current in the static breaker without the risk of re-strike of the mechanical switch.

4. Base Simulation Model

5. Interrupting SSPD simulation schematics: The main active power circuit components to the Solid State Interrupter are first an actively controlled power semiconductor switch in each leg of the system that requires protection, second current limiting inductor and third snubber circuitry to dissipate the inductive stored energy between the source and the fault.

6. Input current DC current DC voltage

7. Interrupting SSPD waveforms

8. Limiter Topology The main active power circuit components to the Solid State Current Limiter are first an actively controlled power semiconductor switch in each leg of the system that requires protection, second current limiting inductor, third a freewheeling diode to provide a path for stored inductive energy when the power semiconductors are turned off.

9. Model for limiting topology

10. Limiting Topology