1. Local Area Tracking system System Control Unit

2. Goals Configure Spartan 3 FPGA development board to boot and run uClinux OS Configure Spartan 3 FPGA development board to boot and run uClinux OS Be able to control dev board peripherals Be able to control dev board peripherals Optimize design for best CPU performance Optimize design for best CPU performance Caching Caching Increased clock speed Increased clock speed Be able to include and interact with future system components Be able to include and interact with future system components

3. uClinux Get the kernel configuration right Get the kernel configuration right Set up hardware to match uClinux kernel configuration Set up hardware to match uClinux kernel configuration Efficient coding to allow BRAM for Microblaze instruction and data caching Efficient coding to allow BRAM for Microblaze instruction and data caching

4. Trail of tears… First attempt was to boot uClinux at default 50 MHz CPU speed First attempt was to boot uClinux at default 50 MHz CPU speed Next was to enable instruction and data caching Next was to enable instruction and data caching Finally, increased clock speed achieved our current best speed of 39.42 BogoMIPS. Finally, increased clock speed achieved our current best speed of 39.42 BogoMIPS.

5. Linux version 2.4.27-uc1 (root@curly.hitl.washington.edu) (gcc version 2.95.3-4 Xilinx EDK 6.2.1 Build EDK_Gm.12.3) #12 Mon Nov 15 17:58:31 PST 2004 On node 0 totalpages: 2048 zone(0): 2048 pages. zone(1): 0 pages. zone(2): 0 pages. CPU: MICROBLAZE Console: xmbserial on UARTLite Kernel command line: Calibrating delay loop... 39.42 BogoMIPS Memory: 8MB = 8MB total Memory: 6784KB available (653K code, 654K data, 40K init) Dentry cache hash table entries: 1024 (order: 1, 8192 bytes) Inode cache hash table entries: 512 (order: 0, 4096 bytes) Mount cache hash table entries: 512 (order: 0, 4096 bytes) Buffer cache hash table entries: 1024 (order: 0, 4096 bytes) Page-cache hash table entries: 2048 (order: 1, 8192 bytes) POSIX conformance testing by UNIFIX Linux NET4.0 for Linux 2.4 Based upon Swansea University Computer Society NET3.039 Microblaze UARTlite serial driver version 1.00 ttyS0 at 0xffff2000 (irq = 1) is a Microblaze UARTlite ttyS1 at 0xffff4000 (irq = 2) is a Microblaze UARTlite Starting kswapd xgpio #0 at 0xFFFF5000 mapped to 0xFFFF5000 Xilinx GPIO registered RAMDISK driver initialized: 16 RAM disks of 4096K size 1024 blocksize MBVanilla flash probe(0xff000000,4194304,4): 400000 at ff000000 CFI: Found no Flash device at location zero Successful Boot

6. Search for id:(00 00) interleave(2) type(2) Search for id:(00 00) interleave(2) type(1) Search for id:(00 00) interleave(4) type(2) Search for id:(00 00) interleave(4) type(1) JEDEC: Found no Flash device at location zero MBVanilla ram probe(0x800d59e4,466944,4): 72000 at 800d59e4 Creating 1 MTD partitions on "RAM": 0x00000000-0x00072000 : "Romfs" mtd: Giving out device 0 to Romfs VFS: Mounted root (romfs filesystem) readonly. Freeing init memory: 40K Shell invoked to run file: /etc/rc Command: hostname microblaze1 Command: ifconfig lo 127.0.0.1 ifconfig: socket: Address family not supported by protocol pid 10: failed 256 Command: ifconfig eth0 192.168.1.1 ifconfig: socket: Address family not supported by protocol pid 11: failed 256 Command: /bin/expand /etc/ramfs.img /dev/ram0 Command: /bin/expand /etc/ramfs.img /dev/ram1 Command: mount -t proc proc /proc Command: mount -t ext2 /dev/ram0 /var Command: mount -t ext2 /dev/ram1 /usr

7. Command: portmap & [17] Command: mkdir /var/tmp Command: mkdir /var/log Command: mkdir /var/run Command: mkdir /var/lock Command: cat /etc/motd Welcome to ____ _ _ _ _ / ___| (_)_ __ _ _ _ _ | | | | | | | | '_ \| | | | |_| | |___| | | | | | |_| |> < | __,_| \____|_|_|_| |_|\__,_/_/\_> |_) on Microblaze. http://www.itee.uq.edu.au/~jwilliams/mblaze-uclinux Execution Finished, Exiting Sash command shell (version 1.1.1) />

8. Coming soon… Full reference project Full reference project Tutorials on setting up cache, increasing clock speed, and known bugs Tutorials on setting up cache, increasing clock speed, and known bugs