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Improving Dimensional Stability of Microelectronic Substrates by Tuning of Electric Artworks Parsaoran Hutapea Composites Laboratory Department of Mechanical.

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Presentation on theme: "Improving Dimensional Stability of Microelectronic Substrates by Tuning of Electric Artworks Parsaoran Hutapea Composites Laboratory Department of Mechanical."— Presentation transcript:

1 Improving Dimensional Stability of Microelectronic Substrates by Tuning of Electric Artworks Parsaoran Hutapea Composites Laboratory Department of Mechanical Engineering Temple University, Philadelphia, PA 19122 hutapea@temple.edu ASME IMECE Orlando, FL November 10, 2005

2 Overview  Background  Reducing Warpage by Tuning  Reducing Warpage of Microelectronic Substrates  Summary

3 Background

4 Drivers for warpage  glass/epoxy (FR4) and copper have different CTEs => (iso)thermal warpage  thermal gradients => thermal warpage even if CTEs are the same  transient temperature effects => transient thermal warpage  anisotropy non-uniform over PCB => in-plane stress induced warpage Problems  large components & small pitch => small tolerance for warpage  high stresses => low reliability  fabrication (improper soldering), component drop-offs challenge area

5 Analytical Model  X-Y routing for complex PCB’s  homogenized properties calculated X-Y Routing Homogenized Homogenization Plate Theory Model PCB 3D Analysis 2D Lamination Theory

6 Lamination Theory Strain Energy Goal is to use numerical simulation to solve for the coefficients of the A, B, and D matrices and then use the coefficients to back calculate the effective reduced stiffness matrices

7 FR4 FE unit cell models to calculate homogenized properties  different models developed to include effects of complex stress distribution  periodic boundary conditions applied  electric trace width varied  obtained lamina stiffness Grenestedt and Hutapea, J. Appl. Phys., 94(1), 686, 2003

8 Stiffness (Q   CTE’s (   )  compared the homogenized properties with the Voigt and Reuss Estimations  analytical models developed as a function of copper volume fractions:, where e.g., Traces

9 Reducing Warpage by Tuning

10 Note on Copper Balance  copper amounts in layers placed on opposite sides of the mid-plane, and at the same distance from it, are made equal  achieved by adding ground planes, perforating ground or power planes, etc.  copper balancing is NOT sufficient to minimize warpage  trace directions and anisotropy influence warpage as much as copper amount OriginalTuned 0.159E-041.580E-04 0.159E-041.580E-04 00 (1/mm) 0.210.0046 (1/mm) -0.21-0.0046 00 warpage reduced by ~ 98% ! Grenestedt and Hutapea, J. Appl. Phys., 94(1), 686, 2003 Original Tuned 100% copper balanced

11 Board B Board C Board A original tuned Experiments  experimental using a scaled-up size (due to manufacturing issues)  size effects observed warpage reduced! manufactured 10 times larger than typical

12 Applied on PCB  divide PCB into 14x19 areas  calculate effective PCB properties in each area  make FE model with 14x19 areas (1064 shell elements) and calculate warpage  “tune” the artwork by allowing e.g. 10% change in copper amount in each of the 6x14x19 layers (1596 design variables) 0.025’ 0.023’ original tuned Using shape optimization to search for the optimal 1596 copper amounts Six-layer PCB A, B, D N T, M T

13 Y-Z View Tuned Original X-Z View Original Tuned  10% changes in trace width  warpage decreased by 80%! Original Tuned original tuned X-Z View Y-Z View

14 Reducing Warpage of Microelectronic Substrates

15 Objectives  calculate homogenized properties of electric traces, PTH’s,  vias, and adhesion holes  mechanics-based explanation of warpage  develop numerical tools PTH  via adhesion holes Traces Substrate 1 Substrate 2

16 Method  Lamination Theory  need homogenized properties of substrate features such as traces, PTH’s,  vias, adhesion holes, etc. 4F3F2F1FC 1BC 2B 3B 4B PTH Homogenized Substrate

17 PTH Stiffness (Q   CTE’s (   ) Homogenized Properties substrate features: traces, PTHs,  vias, adhesion holes

18 Substrate 2 Exp. (avg)Pred. (avg) CTE X (ppm/°C) A: 18.7218.12 B: 18.3317.90 C: 20.5719.75 D: 18.1617.91 AB CD Substrate 2 Exp. (avg)Pred. (avg) CTE Y (ppm/°C) A: 16.9918.03 B: 17.1417.81 C: 19.4619.67 D: 17.5717.74 Experimental & Numerical Comparison  measure CTE’s using digital image correlation (Intel)  predict CTE’s using lamination theory

19 Stiffness using Tensile Test more PTH and  vias

20 Stress-Strain Curves specimen 3 (die shadow region)

21 Spec. 1Spec. 2Spec. 3Spec. 4Spec. 5 Pred. (avg) 26.2024.8721.0524.4025.79 Exp.** (avg) 26.61 (29.51, 23.71) 25.45 (25.54, 25.35) 18.42 (17.83, 19.00) 25.17 (25.16, 25.18) 24.06 (24.22, 23.90) ** Stiffnesses are calculated from stress-strain data up to 0.2% (~ linear part) Stiffness Comparison stiffness was the lowest in the die shadow region (specimen 3)

22 Summary  developed analytical models to estimate effective properties with (arbitrary) traces  developed tuning strategy, indicates that warpage can be reduced by approx. 80%  analyses and experiments showed different warpage in the substrates  homogenized properties of substrate features  experimental verification  future work: tuning and software and numerical tools

23 Joachim L. Grenestedt (Lehigh University) Mitul Modi (Intel Corporation) Kristopher Frutschy (Intel Corporation) Acknowledgements

24 Questions?


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