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April 12 | Comparison of Sophisticated Synthesizer Concepts and Modern Step Attenuator Implementations | 2 Comparison of Sophisticated Synthesizer Concepts.

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Presentation on theme: "April 12 | Comparison of Sophisticated Synthesizer Concepts and Modern Step Attenuator Implementations | 2 Comparison of Sophisticated Synthesizer Concepts."— Presentation transcript:

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2 April 12 | Comparison of Sophisticated Synthesizer Concepts and Modern Step Attenuator Implementations | 2 Comparison of Sophisticated Synthesizer Concepts and Modern Step Attenuator Implementations Setting a frequency on a signal generator should always be fast and accurate. This workshop will look at different synthesizer concepts that fulfill this task. The attendee will learn about the advantages and disadvantages of YIG- or VCO-based synthesizers. To set a specific low output power on a signal generator, an internal step attenuator is normally used, which should again be fast and accurate. Two different concepts will be shown in detail – the mechanical and the electronic step attenuator – as well as their advantages and limitations.

3 April 12 | Comparison of Sophisticated Synthesizer Concepts and Modern Step Attenuator Implementations | 3 Agenda Synthesizer Concepts l Synthesizer l Phased Locked Loop (PLL) l YIG and VCO Step Attenuator Implementations l Step Attenuator l Comparison

4 April 12 | Comparison of Sophisticated Synthesizer Concepts and Modern Step Attenuator Implementations | 4 Synthesizer Fundamentals Conventional Synthesizer +No degradation of the FM deviation below 187.5 MHz (due to mixer concept) +IQ modulator realization „easier“ in the frequency range 187.5 MHz to 6 GHz - SSB phase noise and non harmonics becomes worse below 187.5 MHz due to mixer based down-conversion PLL 2N2N 1 50 kHz to 6 GHz REF (10 MHz) 187.5 MHz to 6 GHz 3 GHz to 6 GHz LO PLL:Phased Locked Loop I/Q 187.5 MHz to 6 GHz 50 kHz to 187.5 MHz

5 April 12 | Comparison of Sophisticated Synthesizer Concepts and Modern Step Attenuator Implementations | 5 Synthesizer Fundamentals Rohde & Schwarz Synthesizer PLL 2N2N 1 DDS Modul 9 kHz To 6 GHz DDS:Direct Digital Synthesis PLL:Phased Locked Loop REF 9 kHz to 23.4375 MHz 3 GHz to 6 GHz +Excellent SSB phase noise and non harmonics down to 23.4375 MHz due to extended divider range +Excellent SSB phase noise and non harmonics below 23.4375 MHz due to bypass concept +Excellent Non Harmonics (patented DDS-algorithm) +Digital generation of modulation (AM, FM/  M, IQ, pulse) possible below 23.4375 MHz by the DDS module -IQ modulator from 23.4375 MHz to 6GHz difficult to realize -Reduced FM deviation from 23.4375 MHz to 187.5 MHz PLL Clock I/Q 23.4375 MHz to 6 GHz

6 April 12 | Comparison of Sophisticated Synthesizer Concepts and Modern Step Attenuator Implementations | 6 Synthesizer Performance Improved SSB phase noise for low frequencies due to extended divider range plus DDS concept

7 April 12 | Comparison of Sophisticated Synthesizer Concepts and Modern Step Attenuator Implementations | 7 Synthesizer Performance Improved SSB phase noise for low frequencies due to extended divider range plus DDS concept

8 April 12 | Comparison of Sophisticated Synthesizer Concepts and Modern Step Attenuator Implementations | 8 Synthesizer Performance – Close in Phase Noise The close in SSB phase noise is mainly influenced by the reference oscillator quality The appropriate loop bandwidth is taken in accordance to the used reference oscillator In case of an external reference it must be possible to adapt the loop bandwidth

9 April 12 | Comparison of Sophisticated Synthesizer Concepts and Modern Step Attenuator Implementations | 9 Oscillator 1 n Phase detector REF LP Simplified PLL block diagram Minimum requirementsFast settling time High frequency resolution Excellent spectral purity (phase noise, spurious,…) Sufficient frequency range f min … f max General considerations Synthesizer Phased Locked Loop (PLL) Changing the loop bandwidth affects: Single sideband phase noise Frequency settling time and characteristic

10 April 12 | Comparison of Sophisticated Synthesizer Concepts and Modern Step Attenuator Implementations | 10 Phased Locked Loop (PLL) Loop Bandwidth Reference Oscillator Oscillator Different Loop Bandwidths: 20 kHz 100 kHz 400 kHz Reference Oscillator: A high quality reference oscillator moves the red line to the left, whereas a worse quality moves it to the right Oscillator: The SSB phase noise performance of a YIG oscillator is better than of a VCO. So the YIG line is left of the VCO line.

11 April 12 | Comparison of Sophisticated Synthesizer Concepts and Modern Step Attenuator Implementations | 11 Phased Locked Loop (PLL) Loop Bandwidth ↔ Non Harmonics Oscillator 1 n Phase detector Clock e.g. 100 MHz LP 3 … 6 GHz RF FrequencyOffset from 4 GHz 4 GHz0 kHz 4.1 GHz100 MHz 4.000100 GHz100 kHz 4.000010 GHz10 kHz 100 MHz … but, due to cross talk the RF as well ! SSB phase noise / dBc/Hz Frequency offset / Hz RF = 4.000100 GHz (100 kHz offset) e.g. Loop Bandwidth 20 kHz SSB phase noise / dBc/Hz Frequency offset / kHz RF = 4.000010 GHz (10 kHz offset) The cross talk RF is outside the loop bandwidth => Good suppression of the non harmonics The cross talk RF is inside the loop bandwidth => Bad suppression of the non harmonics 10 20 30 40

12 April 12 | Comparison of Sophisticated Synthesizer Concepts and Modern Step Attenuator Implementations | 12 Phased Locked Loop (PLL) Non Harmonics The way to get low non harmonics:  Advanced synthesizer architecture Optimized (patented) fractional N algorithm High, variable reference frequency (DDS based) Patented DDS algorithm Sophisticated synthesizer layout design

13 April 12 | Comparison of Sophisticated Synthesizer Concepts and Modern Step Attenuator Implementations | 13 YIG and VCO Fundamentals The main contributions to the above PLL parameters are contributed by the utilized oscillator technology Two alternatives are currently available: YIG (Yttrium-Iron-Garnet) based design VCO (Voltage Controlled Oscillator) based design Main PLL parameters: Single sideband phase noise Frequency settling time and characteristic

14 April 12 | Comparison of Sophisticated Synthesizer Concepts and Modern Step Attenuator Implementations | 14 YIG and VCO Comparison  At very low frequency offset the Reference source dominates the SSB phase noise  The main contributions to the SSB phase noise are contributed by the utilized oscillator technology  For higher frequency offsets (outside the loop filter bandwidth) the noise floor can be seen SSB phase noise / dBc/Hz Frequency offset / Hz VCO YIG 

15 April 12 | Comparison of Sophisticated Synthesizer Concepts and Modern Step Attenuator Implementations | 15 : has advantages/benefits against the other technology VCOYIG Phase Noise Harmonics Wideband noise Output power Drift Temperature sensibility Vibration sensibility Electromagnetic sensibility Broad band High frequency Low frequency Setting time Tuning speed Price Power consumption Required space Can be integrated (MMIC) YIG and VCO Comparison

16 April 12 | Comparison of Sophisticated Synthesizer Concepts and Modern Step Attenuator Implementations | 16 YIG and VCO Performance of the R&S YIG R&S YIG 3,75-8,25 GHz < -130 dBc/Hz (8 GHz; @100 kHz) YIG 3,75-8,25 GHz (not R&S) < -126 dBc/Hz (8 GHz; @100 kHz)

17 April 12 | Comparison of Sophisticated Synthesizer Concepts and Modern Step Attenuator Implementations | 17 YIG and VCO Photos YIG oscillator (R&S)

18 April 12 | Comparison of Sophisticated Synthesizer Concepts and Modern Step Attenuator Implementations | 18 YIG and VCO Photos d = 300 µm

19 April 12 | Comparison of Sophisticated Synthesizer Concepts and Modern Step Attenuator Implementations | 19 Signal Generator Ouput Power and Dynamic Range Output Power - Requirements High Accuracy High stability versus time Excellent level repeatability High dynamic range Short settling time “Unlimited“ switching cylces RF output power

20 April 12 | Comparison of Sophisticated Synthesizer Concepts and Modern Step Attenuator Implementations | 20 Signal Generator Requirements RF output power High Accuracy ALC (Automatic Loop Control) in combination with output level correction Low VSWR (Voltage Standing Wave Ratio) High stability versus time Low temperature drift Eliminate aging of components Excellent level repeatability Low temperature drift Eliminate aging of components (wear and tear free attenuator) High dynamic range Extension of the dynamic range of the ALC in combination with the a step attenuator Short settling time Mechanical step attenuator versus electronic step attenuator “Unlimited“ switching cycles Wear and tear of used switches

21 April 12 | Comparison of Sophisticated Synthesizer Concepts and Modern Step Attenuator Implementations | 21 Signal Generator Real Output Power? Which RF output power ? cables, modules, etc… But (and this is a different story)…, the measured output power is heavily influenced by the complete measurement setup (losses, VSWR, etc…) Example: Source mismatch: 1.5 Load Mismatch: 1.5 Measurement error  8%  Error [dB] = 10 * log (1 + x [%] / 100 %) = 0.334 dB

22 April 12 | Comparison of Sophisticated Synthesizer Concepts and Modern Step Attenuator Implementations | 22 Signal Generator Ouput Power and Dynamic Range Attenuator input power [dBm] Activated attenuator pads (assumption: 0dB conversion loss) Output power [dBm] 5 dB10 dB20 dB40 dB 25 55 9  4 9  9  -106 Example: The electronic level range of the ALC is 40 dB (starting at e.g. -15 dBm up to + 25 dBm) The internal step attenuator offers a dynamic of e.g. 115 dB (attenuator pads of 5, 10, 20 and 2 times 40 dB) 5 dB10 dB20 dB40 dB

23 April 12 | Comparison of Sophisticated Synthesizer Concepts and Modern Step Attenuator Implementations | 23 Signal Generator Output Power and Dynamic Range Conventional Signal Generator Implementation I ALC 5 dB10 dB PA 20 dB, 40 dB & 40 dB Mechanical step attenuator Coupler RF-Signal from the synthesis +High dynamic range +The mechanical attenuator is the only solution for high frequencies (> 12.75 GHz) +Low temperature drift of the mechanical attenuator +Low insertion loss of the mechanical step attenuator +Low VSWR -Long switching time of the mechanical step attenuator (> 20 ms) -Not wear and tear free -Noisy when operated (could be an issue in case of level sweeps) Mechanical relay

24 April 12 | Comparison of Sophisticated Synthesizer Concepts and Modern Step Attenuator Implementations | 24 Signal Generator Dynamic Range Conventional Signal Generator Implementation II ALC 5 dB10 dB PA 20 dB, 40 dB & 40 dB Electronic step attenuator Coupler RF-Signal from the synthesis +High dynamic range +Short switching time of the electronic step attenuator +Wear and tear free -Maximum frequency limited by high insertion loss of the electronic step attenuator (appr. 10 dB at 6 GHz) -Low output level -Higher temperature drift of the GaAs switches in contrast to mechanical switches -GaAs technology of switches critical GaAs Electronic switch

25 April 12 | Comparison of Sophisticated Synthesizer Concepts and Modern Step Attenuator Implementations | 25 Signal Generator Dynamic Range Conventional Signal Generator Implementation III GaAs Electronic switch ALC 5 dB10 dB PA 20 dB 40 dB & 40 dB Electronic step attenuator Coupler RF-Signal from the synthesis PA +High dynamic range +Short switching time of the electronic step attenuator +Wear and tear free +High output power by PA (Power Amplifier) -Maximum frequency limited by high insertion loss of the electronic step attenuator (appr. 10 dB at 6 GHz) -Higher temperature drift of the GaAs switches in contrast to mechanical switches -GaAs technology of switches critical -Extra components (PA) -Higher distortions and temperature drift in PA case

26 April 12 | Comparison of Sophisticated Synthesizer Concepts and Modern Step Attenuator Implementations | 26 Signal Generator Dynamic Range R&S Signal Generator Realization CMOS Electronic switch +High dynamic range +Short switching time of the CMOS electronic step attenuator +Wear and tear free +High output power by PA (Power Amplifier) +Excellent level settling behavior of CMOS switches +Additional overvoltage protection +Low temperature drift due to analog temperature compensation +CMOS technology robust 20 dB 40 dB & 40 dB 5 dB10 dB ALC PA T Electronic step attenuator Coupler RF-Signal from the synthesis Overvoltage protection -Electronic step attenuators are not available for > 12.75 GHz -Extra components (PA) -Higher distortions in PA case

27 April 12 | Comparison of Sophisticated Synthesizer Concepts and Modern Step Attenuator Implementations | 27 Step Attenuator Mechanical Step AttenuatorElectronic Step Attenuator

28 April 12 | Comparison of Sophisticated Synthesizer Concepts and Modern Step Attenuator Implementations | 28


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