1. C OMPUTER O RGANIZATION AND D ESIGN The Hardware/Software Interface 5 th Edition Chapter 1 Computer Abstractions and Technology

2. Why Computer Architecture? Yes, I know, it’s a required class… Chapter 1 — Computer Abstractions and Technology — 2

3. Why Computer Architecture? Embarrassing if you have a CS degree and can’t make sense of the following terms: DRAM, pipelining, cache hierarchies, I/O, virtual memory, … Embarrassing if you have a CS degree and can’t decide which processor to buy: 3 GHz P4 or 2.5 GHz Athlon (helps us reason about performance/power), … Chapter 1 — Computer Abstractions and Technology — 3

4. Why Computer Architecture? Obvious first step for chip designers, compiler/OS writers Will knowledge of the hardware help you write better programs? Chapter 1 — Computer Abstractions and Technology — 4

5. Must a Programmer Care About Hardware? Must know how to reason about program performance and energy Memory management: if we understand how/where data is placed, we can help ensure that relevant data is nearby Thread management: if we understand how threads interact, we can write smarter multi-threaded programs Why do we care about multi-threaded programs? Chapter 1 — Computer Abstractions and Technology — 5

6. Example Tower of Hanoi program void main(){ int ndisks; int frompeg = 1; int topeg = 3; int temppeg = 2; cout << "Enter the number of disks you want to move (use 15)? "; cin >> ndisks; move(ndisks, frompeg, topeg, temppeg); cout << "Done"; system("pause"); } void move(int ndisks, int frompeg, int topeg, int temppeg){ if(ndisks > 1){ move(ndisks-1, frompeg, temppeg, topeg); cout << "move disk " << ndisks << " from peg " << frompeg << " to peg " << topeg << endl; move(ndisks-1, temppeg, topeg, frompeg); } else { cout << "move disk " << ndisks << " from peg " << frompeg << " to peg " << topeg << endl << endl; } Chapter 1 — Computer Abstractions and Technology — 6

7. Example How to achieve a 200x speedup for matrix vector multiplication? Data level parallelism: 3.8x Loop unrolling and out-of-order execution: 2.3x Cache blocking: 2.5x Thread level parallelism: 14x Chapter 1 — Computer Abstractions and Technology — 7

8. Chapter 1 — Computer Abstractions and Technology — 8 The Computer Revolution Progress in computer technology Underpinned by Moore’s Law Makes novel applications feasible Computers in automobiles Cell phones Human genome project World Wide Web Search Engines Computers are pervasive §1.1 Introduction

9. Chapter 1 — Computer Abstractions and Technology — 9 Classes of Computers Personal computers General purpose, variety of software Subject to cost/performance tradeoff Server computers Network based High capacity, performance, reliability Range from small servers to building sized

10. Classes of Computers Supercomputers High-end scientific and engineering calculations Highest capability but represent a small fraction of the overall computer market Embedded computers Hidden as components of systems Stringent power/performance/cost constraints Chapter 1 — Computer Abstractions and Technology — 10

11. Chapter 1 — Computer Abstractions and Technology — 11 The PostPC Era

12. Chapter 1 — Computer Abstractions and Technology — 12 Personal Mobile Device (PMD) Battery operated Connects to the Internet Hundreds of dollars Smart phones, tablets, electronic glasses Cloud computing Warehouse Scale Computers (WSC) Software as a Service (SaaS) Portion of software run on a PMD and a portion run in the Cloud Amazon and Google

13. Chapter 1 — Computer Abstractions and Technology — 13 What You Will Learn How programs are translated into the machine language And how the hardware executes them The hardware/software interface What determines program performance And how it can be improved How hardware designers improve performance What is parallel processing

14. Chapter 1 — Computer Abstractions and Technology — 14 Understanding Performance The performance of a program depends on many factors...both hardware and software

15. Chapter 1 — Computer Abstractions and Technology — 15 Understanding Performance Algorithm Determines number of operations executed Programming language, compiler, architecture Determine number of machine instructions executed per operation Processor and memory system Determine how fast instructions are executed I/O system (including OS) Determines how fast I/O operations are executed

16. Eight Great Ideas Design for Moore’s Law Use abstraction to simplify design Make the common case fast Performance via parallelism Performance via pipelining Performance via prediction Hierarchy of memories Dependability via redundancy Chapter 1 — Computer Abstractions and Technology — 16 §1.2 Eight Great Ideas in Computer Architecture

17. Chapter 1 — Computer Abstractions and Technology — 17 Below Your Program Application software Written in high-level language System software Compiler: translates HLL code to machine code Operating System: service code Handling input/output Managing memory and storage Scheduling tasks & sharing resources Hardware Processor, memory, I/O controllers §1.3 Below Your Program

18. Chapter 1 — Computer Abstractions and Technology — 18 Levels of Program Code High-level language Level of abstraction closer to problem domain Provides for productivity and portability Assembly language Textual representation of instructions Hardware representation Binary digits (bits) Encoded instructions and data

19. Chapter 1 — Computer Abstractions and Technology — 19 Components of a Computer Same components for all kinds of computer Desktop, server, embedded Input/output includes User-interface devices Display, keyboard, mouse Storage devices Hard disk, CD/DVD, flash Network adapters For communicating with other computers §1.4 Under the Covers The BIG Picture

20. Chapter 1 — Computer Abstractions and Technology — 20 Touchscreen PostPC device Supersedes keyboard and mouse Resistive and Capacitive types Most tablets, smart phones use capacitive Capacitive allows multiple touches simultaneously

21. Chapter 1 — Computer Abstractions and Technology — 21 Through the Looking Glass LCD screen: picture elements (pixels) Mirrors content of frame buffer memory

22. Chapter 1 — Computer Abstractions and Technology — 22 Opening the Box Capacitive multitouch LCD screen 3.8 V, 25 Watt-hour battery Computer board

23. Chapter 1 — Computer Abstractions and Technology — 23 Inside the Processor (CPU) Datapath: performs operations on data Control: sequences datapath, memory,... Cache memory Small fast SRAM memory for immediate access to data

24. Chapter 1 — Computer Abstractions and Technology — 24 Inside the Processor Apple A5

25. Chapter 1 — Computer Abstractions and Technology — 25 Abstractions Abstraction helps us deal with complexity Hide lower-level detail Instruction set architecture (ISA) The hardware/software interface Application binary interface The ISA plus system software interface Implementation Hardware that obeys the architecture abstraction. The BIG Picture

26. Chapter 1 — Computer Abstractions and Technology — 26 A Safe Place for Data Volatile main memory Loses instructions and data when power off Non-volatile secondary memory Magnetic disk Flash memory Optical disk (CDROM, DVD)

27. Chapter 1 — Computer Abstractions and Technology — 27 Networks Communication, resource sharing, nonlocal access Local area network (LAN): Ethernet Wide area network (WAN): the Internet Wireless network: WiFi, Bluetooth

28. Chapter 1 — Computer Abstractions and Technology — 28 Technology Trends Electronics technology continues to evolve Increased capacity and performance Reduced cost YearTechnologyRelative performance/cost 1951Vacuum tube1 1965Transistor35 1975Integrated circuit (IC)900 1995Very large scale IC (VLSI)2,400,000 2013Ultra large scale IC250,000,000,000 DRAM capacity §1.5 Technologies for Building Processors and Memory

29. Semiconductor Technology Silicon: semiconductor Add materials to transform properties: Conductors Insulators Switch Chapter 1 — Computer Abstractions and Technology — 29

30. Chapter 1 — Computer Abstractions and Technology — 30 Manufacturing ICs Yield: proportion of working dies per wafer

31. Chapter 1 — Computer Abstractions and Technology — 31 Intel Core i7 Wafer 300mm wafer, 280 chips, 32nm technology Each chip is 20.7 x 10.5 mm

32. Chapter 1 — Computer Abstractions and Technology — 32 Integrated Circuit Cost Nonlinear relation to area and defect rate Wafer cost and area are fixed Defect rate determined by manufacturing process Die area determined by architecture and circuit design

33. Chapter 1 — Computer Abstractions and Technology — 33 Defining Performance Which airplane has the best performance? Boeing 777 Boeing 747 BAC/SUD Concorde Douglas DC-8-50 §1.6 Performance

34. Chapter 1 — Computer Abstractions and Technology — 34 Defining Performance Which airplane has the best performance? §1.6 Performance

35. Chapter 1 — Computer Abstractions and Technology — 35 Response Time and Throughput Response time How long it takes to do a task Throughput Total work done per unit time e.g., tasks/transactions/… per hour How are response time and throughput affected by Replacing the processor with a faster version? Adding more processors?

36. Chapter 1 — Computer Abstractions and Technology — 36 Response Time and Throughput How are response time and throughput affected by Replacing the processor with a faster version? Decreasing response time almost always improves throughput. Hence this will improve both response time and throughput. Adding more processors? No one task gets work done faster, so only throughput increases.

37. Chapter 1 — Computer Abstractions and Technology — 37 Response Time and Throughput Single user interested in response time Datacenter interested in throughput or bandwidth For now we will be primarily concerned with response time To maximize performance, we want to minimize response time or execution time for some task

38. Chapter 1 — Computer Abstractions and Technology — 38 Relative Performance Define Performance = 1/Execution Time “X is n time faster than Y” Example: time taken to run a program 10s on X, 15s on Y Execution Time Y / Execution Time X = 15s / 10s = 1.5 So X is 1.5 times faster than Y

39. Chapter 1 — Computer Abstractions and Technology — 39 Measuring Execution Time Elapsed time Total response time, including all aspects Processing, I/O, OS overhead, idle time Determines system performance CPU time Time spent processing a given job Discounts I/O time, other jobs’ shares Comprises user CPU time and system CPU time Different programs are affected differently by CPU and system performance

40. Chapter 1 — Computer Abstractions and Technology — 40 CPU Clocking Operation of digital hardware governed by a constant-rate clock Clock (cycles) Data transfer and computation Update state Clock period Clock period: duration of a clock cycle e.g., 250ps = 0.25ns = 250×10 –12 s Clock frequency (rate): cycles per second e.g., 4.0GHz = 4000MHz = 4.0×10 9 Hz

41. Chapter 1 — Computer Abstractions and Technology — 41 CPU Time Performance improved by Reducing number of clock cycles Increasing clock rate Hardware designer must often trade off clock rate against cycle count

42. Chapter 1 — Computer Abstractions and Technology — 42 CPU Time Example Computer A: 2GHz clock, 10s CPU time Designing Computer B Aim for 6s CPU time Can do faster clock, but causes 1.2 × clock cycles How fast must Computer B clock be?

43. Chapter 1 — Computer Abstractions and Technology — 43 Instruction Count and CPI Instruction Count for a program Determined by program, ISA and compiler Average cycles per instruction Determined by CPU hardware If different instructions have different CPI Average CPI affected by instruction mix

44. Chapter 1 — Computer Abstractions and Technology — 44 CPI Example Computer A: Cycle Time = 250ps, CPI = 2.0 Computer B: Cycle Time = 500ps, CPI = 1.2 Same ISA and running the same program Which is faster, and by how much? A is faster… …by this much

45. Chapter 1 — Computer Abstractions and Technology — 45 CPI in More Detail If different instruction classes take different numbers of cycles Weighted average CPI Relative frequency

46. Chapter 1 — Computer Abstractions and Technology — 46 CPI Example Alternative compiled code sequences using instructions in classes A, B, C ClassABC CPI for class123 IC in sequence 1212 IC in sequence 2411 Sequence 1: IC = 5 Clock Cycles = 2×1 + 1×2 + 2×3 = 10 Avg. CPI = 10/5 = 2.0 Sequence 2: IC = 6 Clock Cycles = 4×1 + 1×2 + 1×3 = 9 Avg. CPI = 9/6 = 1.5

47. Chapter 1 — Computer Abstractions and Technology — 47 Performance Summary Performance depends on Algorithm: affects IC, possibly CPI Programming language: affects IC, CPI Compiler: affects IC, CPI Instruction set architecture: affects IC, CPI, T c The BIG Picture

48. Chapter 1 — Computer Abstractions and Technology — 48 Power Trends Figure shows the increase in clock rate and power of eight generations of Intel microprocessors. Both increased rapidly for decades, and then flattened off recently. §1.7 The Power Wall

49. Chapter 1 — Computer Abstractions and Technology — 49 Power Trends Reason for their recent slowing is that we have run into the practical power limit for cooling the microprocessors. In the PostPC Era the really critical resource is energy. Battery life trumps all other metrics §1.7 The Power Wall

50. Chapter 1 — Computer Abstractions and Technology — 50 Power Trends The dominant technology for ICs is CMOS For CMOS, the primary source of energy consumption is dynamic energy, i.e. energy that is consumed when transistors switch states from 0 to 1 and vice versa. In CMOS IC technology §1.7 The Power Wall ×1000 ×30 5V → 1V

51. Chapter 1 — Computer Abstractions and Technology — 51 Power Trends The capacitive load per transistor is a function of both the number of transistors connected to an output (fanout) and the capacitance of both wires and transistors. Frequency switched is a function of the clock rate. Problem with lowering voltage further. Increase cooling and turning off parts. §1.7 The Power Wall

52. Chapter 1 — Computer Abstractions and Technology — 52 Reducing Power Suppose a new CPU has 85% of capacitive load of old CPU 15% voltage and 15% frequency reduction The power wall We can’t reduce voltage further We can’t remove more heat How else can we improve performance?

53. Chapter 1 — Computer Abstractions and Technology — 53 Uniprocessor Performance §1.8 The Sea Change: The Switch to Multiprocessors Constrained by power, instruction-level parallelism, memory latency

54. Chapter 1 — Computer Abstractions and Technology — 54 Multiprocessors Multicore microprocessors More than one processor per chip Requires explicitly parallel programming Compare with instruction level parallelism Hardware executes multiple instructions at once Hidden from the programmer Hard to do Programming for performance Load balancing Optimizing communication and synchronization

55. Chapter 1 — Computer Abstractions and Technology — 55 SPEC CPU Benchmark Programs used to measure performance Supposedly typical of actual workload Standard Performance Evaluation Corp (SPEC) Develops benchmarks for CPU, I/O, Web, … SPEC CPU2006 Elapsed time to execute a selection of programs Negligible I/O, so focuses on CPU performance Consists of a set of 12 integer benchmarks (CINT2006) and 17 floating-point benchmarks (CFP2006) Normalize relative to reference machine SPECratio = Execution Time of Reference Machine/Execution Time of Measure Machine Bigger number indicates faster performance.

56. Chapter 1 — Computer Abstractions and Technology — 56 CINT2006 for Intel Core i7 920

57. Chapter 1 — Computer Abstractions and Technology — 57 SPEC CPU Benchmark To simplify the marketing of computers, SPEC decided to report a single number to summarize all 12 integer benchmarks. Summarize as geometric mean of performance ratios CINT2006 (integer) and CFP2006 (floating-point)

58. Chapter 1 — Computer Abstractions and Technology — 58 SPEC Power Benchmark Given the increasing importance of energy and power, SPEC added a benchmark to measure power

59. Chapter 1 — Computer Abstractions and Technology — 59 SPECpower_ssj2008 for Xeon X5650

60. Chapter 1 — Computer Abstractions and Technology — 60 SPEC Power Benchmark Power consumption of server at different workload levels Performance: ssj_ops/sec Power: Watts (Joules/sec)

61. Chapter 1 — Computer Abstractions and Technology — 61 Fallacy: Low Power at Idle Look back at i7 power benchmark At 100% load: 258W At 50% load: 170W (66% of peak power) At 10% load: 121W (47% of peak power) Google data center Mostly operates at 10% – 50% load At 100% load less than 1% of the time Consider designing processors to make power proportional to load, i.e. 10% load should use 10% of peak power

62. Chapter 1 — Computer Abstractions and Technology — 62 Pitfall: Amdahl’s Law Pitfall: Expecting the improving of one aspect of a computer to increase overall performance by an amount proportional to the size of the improvement. The idea of making the common case fast reminds us that the opportunity for improvement is affected by how much time the event consumes. §1.10 Fallacies and Pitfalls

63. Chapter 1 — Computer Abstractions and Technology — 63 Pitfall: Amdahl’s Law A simple design problem illustrates this well… Suppose a program runs in 100 seconds on a computer, with multiply operations responsible for 80 seconds of this time. How much do I have to improve the speed of multiplication if I want my program to run five times faster? The execution time of a program after making improvement is given by a simple equation known as Amdahl’s Law

64. Chapter 1 — Computer Abstractions and Technology — 64 Pitfall: Amdahl’s Law Amdahl’s Law: T improved = Execution time after improvement T affected = Execution time affected by improvement T unaffected = Execution time unaffected by improvement Improvement factor = Amount of improvement

65. Chapter 1 — Computer Abstractions and Technology — 65 Pitfall: Amdahl’s Law Since we want the performance to be five times faster, the new execution time should be 20 seconds, giving Can’t be done!

66. Chapter 1 — Computer Abstractions and Technology — 66 Pitfall: Amdahl’s Law In other words, there is no amount by which we can enhance multiply to achieve a 5x increase in performance, if multiply accounts for only 80% of the workload. The performance enhancement possible with a given improvement is limited by the amount that the improved feature is used. Corollary: make the common case fast

67. Chapter 1 — Computer Abstractions and Technology — 67 Pitfall: MIPS as a Performance Metric MIPS: Millions of Instructions Per Second CPI varies between programs on a given CPU

68. Chapter 1 — Computer Abstractions and Technology — 68 Pitfall: MIPS as a Performance Metric MIPS: Millions of Instructions Per Second Easy to understand Faster computers mean bigger MIPS Doesn’t account for Capabilities of the instructions Differences in ISAs between computers Instruction count will be different Differences in complexity between instructions CPI varies between programs on a given CPU

69. Chapter 1 — Computer Abstractions and Technology — 69 Concluding Remarks Cost/performance is improving Due to underlying technology development Hierarchical layers of abstraction In both hardware and software Instruction set architecture The hardware/software interface Execution time: the best performance measure Power is a limiting factor Use parallelism to improve performance §1.11 Concluding Remarks