1. Rene BellwiedSTAR Tracking Upgrade Meeting, Boston, 07/10/06 1 ALICE Silicon Pixel Detector (SPD) Rene Bellwied, Wayne State University Layout, Mechanics & cooling, Silicon sensors, Electronics Proposal for STAR Cost Estimate Required resources ?

2. Rene BellwiedSTAR Tracking Upgrade Meeting, Boston, 07/10/06 2 Compare LHC pixels STAR could use one or two pixel layers instead or in combination with Si strip (SSD or new strip detectors) and GEM detectors as a pointnig device for the HFT. There is ample Si hybrid pixel experience at the LHC (and FNAL) –ALICE: 0.2 m 2, 9.8 Million channels –ATLAS: 2m 2, 80 Million channels –CMS: 2m 2, 33 Million channels

3. Rene BellwiedSTAR Tracking Upgrade Meeting, Boston, 07/10/06 3 ALICE-SPD (Hybrid Pixels) - Design Parameters Two barrel layers R i = 39mm, R o = 76mm Pixel cell dimensions50  m (r  ) x 425  m (z) Front-end electronics CMOS6 0.25  m standard process on 8” wafers, rad-hard design Pixel ASIC thickness (target)≤ 150  m (wafers thinned after bump deposition) Si sensor ladder thickness≤ 200  m Flip-chipsolder bumps/indium bumps Pixel busaluminium-polyimide flex Coolingwater/C 6 F 14 /[C 3 F 8 (evaporative)] Material budget (each layer)≈ 0.9% X 0 (Si ≈ 0.37, cooling ≈ 0.3, bus 0.17, support ≈ 0.1) Total Si surface≈ 0.24 m 2 Occupancy< 2%

4. Rene BellwiedSTAR Tracking Upgrade Meeting, Boston, 07/10/06 4 SPD Mechanical Configuration (II) 2 barrel layers z= ± 14.15cm (sensitive) r1 = 3.9 cm, r2 = 7.6 cm

5. Rene BellwiedSTAR Tracking Upgrade Meeting, Boston, 07/10/06 5 SPD Ladders & Staves 1 sector one carbon-fibre support for layer 1+2 4 staves in outer layer 2 staves in inner layer ladder (1 sensor, 5 chips) half-stave: 2 ladders readout of 120 half-staves in parallel Image: INFN Padova SPD total 1200 pixel chips, ≈ 10 7 pixels

6. Rene BellwiedSTAR Tracking Upgrade Meeting, Boston, 07/10/06 6 ALICE SPD Sector Layout (cont.) Extenders Glob top Optical link (STm) MCM Pilot, GOL Grounding foil: kapton 8  m silver.15  m Aluminum/kapton bus Ladder 1 Ladder 2 Spacer SMD components Bias Exploded view FEE & half stave.

7. Rene BellwiedSTAR Tracking Upgrade Meeting, Boston, 07/10/06 7 Pixel Bus & Ladders (II) M. Morel 7-layer Aluminum Kapton Flex 200  m 150  m

8. Rene BellwiedSTAR Tracking Upgrade Meeting, Boston, 07/10/06 8 ALICE Pixel ASIC CMOS6 0.25 µm (8” wafers) Radiation hard design (enclosed transistors) ≈ 13.10 6 transistors 8192 pixel cells 50 µm x 425 µm 256 rows, 32 columns Active area: 12.8mm x 13.6mm 10 MHz clock (JTAG RDO: 5 MHz clock) 1.8V power supply ~100 µW/channel M. Campbell

9. Rene BellwiedSTAR Tracking Upgrade Meeting, Boston, 07/10/06 9 Pixel Cell M. Campbell

10. Rene BellwiedSTAR Tracking Upgrade Meeting, Boston, 07/10/06 10 SPD Sector (II) A. Pepato

11. Rene BellwiedSTAR Tracking Upgrade Meeting, Boston, 07/10/06 11 ALICE SPD Layout settore Endcap sector support Innermost skin of the cylindrical support structure Capillars tubes Cooling collectores placed on the cylindrical SS. Outer layer dissipates about 1 kW

12. Rene BellwiedSTAR Tracking Upgrade Meeting, Boston, 07/10/06 12 Mechanics & Cooling A. Pepato

13. Rene BellwiedSTAR Tracking Upgrade Meeting, Boston, 07/10/06 13 Possible Proposal to STAR Copy the second layer of the ALICE Pixel setup Use the same wafers, electronics, support structure, and cooling Here are the numbers: radius: 7.6 cm, length: 28.3 cm, pixel size: 50 by 425 micron (425 in z-direction) pixel cell (wafer) size: 1.28 by 1.36 cm, number of pixel cells: 800 number of readout channels: ~6.5 Million pixels, wafers per ladder: 20 number of ladders: 4, radiation length (total): 0.9% rad.length (breakdown): 0.4% Si, 0.3% cooling, 0.2% support) cooling: evaporative If one wants to build a second layer at 15 cm the number of wafers (cells) will triple to 2400.

14. Rene BellwiedSTAR Tracking Upgrade Meeting, Boston, 07/10/06 14 Comparison to PHENIX/ALICE setup http://www.phenix.bnl.gov/phenix/WWW/publish/akiba/2004/VTX_rev2/PHENIX-VTX-PROPOSAL.pdf PHENIX uses the ALICE pixels for the two inner layers of their four layer detector. The pixel barrel radii are at 2.5 cm and 5 cm. Both barrels together consists of 480 ALICE pixels. Total pixel detector cost of about 4 Million Dollar. Just in terms of Silicon this project is about 60% of our single barrel approach at a radius of 7.6 cm. Rough cost estimate for our single layer approach ~ 5 Million Dollar.

15. Rene BellwiedSTAR Tracking Upgrade Meeting, Boston, 07/10/06 15 Regarding Nikolai’s simulations A 2 nd layer at r = 6.4 cm (inner layer to the SPD at 7.6 cm): –The project size in terms of Silicon and electronics goes up by: ~ 80% (~1500 instead of 800 pixel detectors) –The detectors on the second layer would have to be rotated by 90 degrees in order to achieve the necessary benefit in the ‘weak resolution’ direction (z-direction). This is a very challenging concept in terms of support structure and readout. –Adapting the ALICE support structure layout to a two layer detector might be easier than re-designing it for a single hybrid pixel layer –One needs to evaluate the specific layout (and material budget) which was optimized for ALICE, e.g. is evaporative cooling really necassary ?