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Solid-State Circuits / Circuit and System Joint Chapter Solid-State Circuits / Circuit and System Joint Chapter IEEE Central Texas Section Fall Planning.

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Presentation on theme: "Solid-State Circuits / Circuit and System Joint Chapter Solid-State Circuits / Circuit and System Joint Chapter IEEE Central Texas Section Fall Planning."— Presentation transcript:

1 Solid-State Circuits / Circuit and System Joint Chapter Solid-State Circuits / Circuit and System Joint Chapter IEEE Central Texas Section Fall Planning Meeting September 8, 2012 San Marcos, TX

2 IEEE Central Texas Section Chapter Leadership Team l Chair: Zhuo Li (IBM, zhuoli@ieee.org) l Vice Chair: Nan Sun (UT Austin, nansun@mail.utexas.edu) l Secretary: Mikel Ash (TI, mikel.ash@ti.com) l Advisor l Matt Felder (matt_felder@yahoo.com) l Haoxing Ren (IBM, renhaoxing@ieee.org)

3 IEEE Central Texas Section Chapter Updates l Meeting location: UT Campus ENS 306 or ACES 2.402 l Officer election will be held at October meeting. l Ten technical meetings, two administrative meetings. l Oct 27 Workshop: IEEE CTS CAS/SSC Workshop: Data Parallelism for Multi-Core Chips and GPU (Speakers from IBM, AMD, Altera, Texas A&M, and maybe Nvidia and Intel). Include tutorial and panel discussion as well. l IEEE Solid State Circuits 2011 Outstanding Chapter Award at ISSCC ($1000 prize)

4 IEEE Central Texas Section 2012 Chapter Meetings DateTechnical/Adm in TopicSpeaker# pl 01/17/12TechnicalIntegrated Systems for a Smarter PlanetDr. Peter Hoftsee (IBM)15 02/07/12TechnicalUltra Low Power Electronics in the Next DecadeAjith Amerasekera (TI)44 03/27/12TechnicalAnnual Review of ISSCC Processor and Memory Matt Felder, Josh Friedrich, Dr. Ramin K. Poorfard and Dr. Betty Prince 23 04/03/12TechnicalAnnual Review of ISSCC Analog and RFMatt Felder, Josh Friedrich, Dr. Ramin K. Poorfard and Dr. Betty Prince 29 05/29/12TechnicalWhat is ESD? Why is it important for Electrical Engineers? Ajay Kuma (TI)13 06/26/12TechnicalSSCS Inaugural Webinar Event - "Dark Secrets of RF Design" Dr. Tom Lee (Stanford)20 07/06/12TechnicalBridging Design and Manufacture of Analog/Mixed-Signal Circuits in Advanced CMOS Dr. Alvin Loke (AMD)12 07/10/12TechnicalMemory and Memory Related Technology Trends at the June 2012 VLSI Symposium Dr. Betty Prince (Memory Strategies International) 20 08/10/12TechnicalIEEE CASS Distinguished Lecture: Ultra Low Power Analog Integrated Circuits for Implantable Medical Devices Dr. Fernando Silveira (Universidad de la República) 22 08/30/12TechnicalIEEE SSCS Distinguished Lecture: Energy Limits in Current A/D Converter Architectures Dr. Boris Murmann (Stanford) 45

5 IEEE Central Texas Section SWOT Analysis l Strengths l Good technical talks, DL program. l Stable attendance rate. l So far one workshop per year in last two years and one planned for this year. l Good leadership pipeline. l Stable funding resource from CAS and SSC Society. l Extra subsidy funding from CAS and SSC for workshop or extra events to promote memberships. l Weaknesses l Find more good technical talks and workshop topics. l Increase attendance rate.

6 IEEE Central Texas Section SWOT Analysis l Opportunities l Local chip design and EDA companies l University of Texas, Austin l Threats l Seminars inside companies and Universities l A less interesting workshop may get cancelled or need more funding.

7 IEEE Central Texas Section Chapter Plans / Issues l Continue ISSCC annual review. l One more SSC Distinguished Lecture in Oct 11. l Cosponsor event/seminars with new CEDA chapter (Aug 30 DL seminar is sponsored by both SSC and CEDA). l Invite Distinguished Lecture Program speakers.

8 IEEE Central Texas Section

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10 QUESTIONS??? Thanks


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